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Wed, 9 Feb 2022 08:42:36 +0900 (KST) Received: from [10.113.113.235] (unknown [10.113.113.235]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20220208234236epsmtip2a1b718c7a8fd270b4cedeebd9cf771f6~R9B-BlNlc1045210452epsmtip2H; Tue, 8 Feb 2022 23:42:36 +0000 (GMT) Message-ID: Date: Wed, 9 Feb 2022 08:43:27 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v4 4/4] rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568 Content-Language: en-US To: Alper Nebi Yasak , u-boot@lists.denx.de Cc: Jack Mitchell , Kever Yang , Heinrich Schuchardt , Yifeng Zhao , Samuel Dionne-Riel , Simon Glass , Aswath Govindraju , Philipp Tomsich , Ashok Reddy Soma , Stephen Carlson , Michal Simek , Faiz Abbas , Jagan Teki , Peng Fan , Peter Robinson From: Jaehoon Chung In-Reply-To: <20220128224240.4226-5-alpernebiyasak@gmail.com> Content-Transfer-Encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA01Te0xTVxzeua8Wt5JLC+UIZGBjsmgGtLy8OlAmdd4Nl5CZTKKJ7Ap3FOhr vRc3J3EEHUxw09rhQtnQbECUCWIFCiISkEcWZCKZ8wFscRZNRV5KmcKAtb2y8d/3+8735fv9 fuccMSqdJoLEWXqeNekZrYJYhTVdWxcRPr6E7FPW1sqpCscgTv08OkZQnQP5CDVTdRilZmwn CKrpuxcENeFMpeYeNhBUXc15gnpeM4NTJecOUl+XFRDUbEMToKrHTuPUeNtREXWtdApQo45F LNGPrp3+E6fL829i9JcPJnH61lU13WIdEdFT03vpOXs3QvcPNwP64kQzQi9Y2zG6944doVuG 7iN027N5LEWyOydewzIZrCmM1acbMrL0mQmK5J1pSWmxcUpVuGojtUERpmd0bIJCvSMl/J0s rXs6Rdh+RpvrplIYjlNEbo43GXJ5Nkxj4PgEBWvM0BpjjREco+Ny9ZkRepbfpFIqo2Ldwo9y NA+KLLixNfQzR0sfmg/qVhcDHzEkY6CrdIDwYCnZDOD56l3FYJUbPwXQapnHhGIWwMY/bOiy Y/HsbUQ4aAPwwpUeXCgmAeyv6BF5VBJyMyy+XOrFGLkWXuouIQTeD/5S5sA8OIBMhc6uBcSD ZeQeaPvH7tWgZCC85zjt5f3JbbDQddTbBkqOYrBjoMhrJsg3oX221yvyIROgq+5vVDCHQvv4 96jHAEmLD2wus+NC32p4vfLSyxlk8HFvg0jAQdB5vFAkGA4DWFXZgQvFMQAX828TgioatldZ 3HFid8Q6eOFypECvgS3zPwAh2RdOuI7hHgkkJfCrQqkgWQsHx5zIctaIY+llPzScOlIPToA1 1hWLsa5YgHXFPNb/g88ArAbIWSOny2Q5lVH1332nG3Q24H3762ObgXl8KqITIGLQCaAYVfhL QkqWGKkkgznwOWsypJlytSzXCWLd12NGgwLSDe7Po+fTVDEblTFxUdExlCpOpQiU1JzqY6Rk JsOzOSxrZE3LPkTsE5SPqN6taLuYs6P9UF7ifVlwxN6Fj122x/VfqLOQsLgQtf+3/HYOGRad G7j3/gey9t4Cc2X9yE0TLTv15M5VNrXdt6CuULY0oAt4tWbrtuyozu6TuDJTJG88XnmjXLvp 08mW94aSBl+Zmy0MNp8Njl7w+/FZ1dI3SOMZTfJPPprW+bflV5xj6NOQu/M9XUdmNFu2Xq/m 44YCXu+XzfXPFo0n333yXLcrcMh8g38Ub3mY7YovG6FtiXz2Bum+D19LCA7dL/8kqXRn3va5 rqFHrS8a5bmVvx46uCfvLbX1Vv90j5pf3Vcvrp8u+r3gtzd207Z0518HiofTqXBrB71Fe3LY N9JSHqTAOA2jWo+aOOZfAMOv3YQEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA01ReUiTYRzu/a59LhZfs/DVDmHYodlULHqLkiEJL0XHH0WmXcu+XKXTtjxK qJW42lYklR3TtAPLWalZbpqatRGlYazbMgtzs8w0Re2yZm0j8r+H5/dc8GNJcTMVwG5T7uJV SnmShBFSZpskcPbnEWJz+Pv6qajQ8YRGV5zdDLLaNQQaLM4m0WBlLoPMp34wqLcrFv3svMmg stKrDPpeOkgjgykLHTlzgEFfb5oButRdRKOeep0A2fL6AHI6XJRsPL7W/47G+ZrHFM7p+ELj 57cX4xpjmwD39W/APy33CNz8phrg673VBP5tbKDw/RYLgWta2wlcPzBMrRTFCRdu4ZO2pfOq sKhNQkXHweN0am1gpqPmIakBZf564MNCbg50lbwk9EDIirlaAE9fPQu8hwA44Mxj9ID9i32h zab2anoAfGvspNwaERcF9bfyBG5McUHwxj0D4+XHw8YzDo9mIhcLtZdOkG7sy8XDC22VHp7k /OBrRxHhxhO4GKgd0lHuApLromDhu2rS22YDsON8mSeV4UKh5et9j8OHWwSHyr6R7nUkNwOW F4q9oYHQ0lNA5gKxcdQO46g+43+HcZTjHKBKgT+fqk5OTFZHpEYo+QypWp6sTlMmShNSkiuB 5+MhwdXAUtontQKCBVYAWVIyQTTZMCIXi7bId+/hVSkbVWlJvNoKJrGUxE9k1zduFHOJ8l38 Dp5P5VX/rgTrE6AhZhFVOdEVrb8drmPrg74vXMBlZOY8avksPRkZ+evZx3qRfX7Ml2MHsFl3 RfLt+cCkuy3RtVPnCUsGZ4bWLR+zL/9238jTttBPVSemRKzYv65Y6JThrplRL0OjYv2PtC47 PEPboJfeGdtGvjFrfB/CjJCAoaXz+63j+tfSZ48GPogzxT9y6QwJ+VJZkbWrTnm5adWa6K05 O9M/ofjpBfsqTA8UkXN9zWEymq7apBsny9qTRRrqxmw3FXTIXRfFJXZG1W4tb+pOFDTipNUv lhivKYITnLjZpC2vqJy2twm90kUHn4zZsdJfcejHtJbc8LiQ9HbBcFG28FTQh7QUe9BsrYRS K+QRIaRKLf8D/LLv+GADAAA= X-CMS-MailID: 20220208234236epcas1p2c94a0152e7e37cd37835f468f74a5c83 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: SVC_REQ_APPROVE CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220128224324epcas1p262bf77fb5dd025476c0f5151e4de4986 References: <20220128224240.4226-1-alpernebiyasak@gmail.com> <20220128224240.4226-5-alpernebiyasak@gmail.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On 1/29/22 07:42, Alper Nebi Yasak wrote: > On RK3568, a register bit must be set to enable Enhanced Strobe. > However, it appears that the address of this register may differ from > vendor to vendor and should be read from the underlying MMC IP. Let the > Rockchip SDHCI driver read this address and set the relevant bit when > Enhanced Strobe configuration is requested. > > Additionally, a bit signifying that the connected hardware is an eMMC > chip must be set to enable Data Strobe for HS400 and HS400ES modes. Also > make the driver set this bit as appropriate. > > This is partly ported from Linux's Synopsys DWC MSHC driver which > happens to be the underlying IP. (drivers/mmc/host/sdhci-of-dwcmshc.c in > Linux tree). > > Signed-off-by: Alper Nebi Yasak Reviewed-by: Jaehoon Chung As you mentioned, if someone test this on RK3568 board, it will be more better. Best Regards, Jaehoon Chung > --- > Only build-tested as I don't have a RK3568 board. > > (no changes since v3) > > Changes in v3: > - Set DWCMSHC_CARD_IS_EMMC bit in rk3568_emmc_phy_init() > > Changes in v2: > - Rename rk3568_set_enhanced_strobe -> rk3568_sdhci_set_enhanced_strobe > - Let set_enhanced_strobe() unset the ES bit if mode is not HS400_ES > > drivers/mmc/rockchip_sdhci.c | 42 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 42 insertions(+) > > diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c > index f4d5a59036a2..1d96c4696b6f 100644 > --- a/drivers/mmc/rockchip_sdhci.c > +++ b/drivers/mmc/rockchip_sdhci.c > @@ -45,6 +45,14 @@ > #define ARASAN_VENDOR_REGISTER 0x78 > #define ARASAN_VENDOR_ENHANCED_STROBE BIT(0) > > +/* DWC IP vendor area 1 pointer */ > +#define DWCMSHC_P_VENDOR_AREA1 0xe8 > +#define DWCMSHC_AREA1_MASK GENMASK(11, 0) > +/* Offset inside the vendor area 1 */ > +#define DWCMSHC_EMMC_CONTROL 0x2c > +#define DWCMSHC_CARD_IS_EMMC BIT(0) > +#define DWCMSHC_ENHANCED_STROBE BIT(8) > + > /* Rockchip specific Registers */ > #define DWCMSHC_EMMC_DLL_CTRL 0x800 > #define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1) > @@ -279,11 +287,25 @@ static int rk3568_emmc_phy_init(struct udevice *dev) > { > struct rockchip_sdhc *prv = dev_get_priv(dev); > struct sdhci_host *host = &prv->host; > + struct mmc *mmc = host->mmc; > u32 extra; > + u32 vendor; > + int reg; > > extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL; > sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); > > + /* set CARD_IS_EMMC bit to enable Data Strobe for HS400 and HS400ES */ > + reg = (sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK) > + + DWCMSHC_EMMC_CONTROL; > + > + vendor = sdhci_readw(host, reg); > + if (IS_MMC(mmc)) > + vendor |= DWCMSHC_CARD_IS_EMMC; > + else > + vendor &= ~DWCMSHC_CARD_IS_EMMC; > + sdhci_writew(host, vendor, reg); > + > return 0; > } > > @@ -346,6 +368,25 @@ static int rk3568_emmc_get_phy(struct udevice *dev) > return 0; > } > > +static int rk3568_sdhci_set_enhanced_strobe(struct sdhci_host *host) > +{ > + struct mmc *mmc = host->mmc; > + u32 vendor; > + int reg; > + > + reg = (sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK) > + + DWCMSHC_EMMC_CONTROL; > + > + vendor = sdhci_readl(host, reg); > + if (mmc->selected_mode == MMC_HS_400_ES) > + vendor |= DWCMSHC_ENHANCED_STROBE; > + else > + vendor &= ~DWCMSHC_ENHANCED_STROBE; > + sdhci_writel(host, vendor, reg); > + > + return 0; > +} > + > static int rk3568_sdhci_set_ios_post(struct sdhci_host *host) > { > struct mmc *mmc = host->mmc; > @@ -554,6 +595,7 @@ static const struct sdhci_data rk3568_data = { > .get_phy = rk3568_emmc_get_phy, > .emmc_phy_init = rk3568_emmc_phy_init, > .set_ios_post = rk3568_sdhci_set_ios_post, > + .set_enhanced_strobe = rk3568_sdhci_set_enhanced_strobe, > }; > > static const struct udevice_id sdhci_ids[] = {