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From: Juergen Gross <jgross@suse.com>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, x86@kernel.org,
	linux-coco@lists.linux.dev,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	"H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH] x86/kvm/tdx: Save %rbp in TDX_MODULE_CALL
Date: Fri, 17 May 2024 16:08:03 +0200	[thread overview]
Message-ID: <f63e1217-3dbe-458d-8c14-7880811d30ba@suse.com> (raw)
In-Reply-To: <ohvjbokpaxagc26kxmlrujab7cw3bekgi5ln7dt46cbsaxcqqh@crvqeohfazmf>


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On 17.05.24 15:55, Kirill A. Shutemov wrote:
> On Fri, May 17, 2024 at 02:14:50PM +0200, Juergen Gross wrote:
>> While testing TDX host support patches, a crash of the host has been
>> observed a few instructions after doing a seamcall. Reason was a
>> clobbered %rbp (set to 0), which occurred in spite of the TDX module
>> offering the feature NOT to modify %rbp across TDX module calls.
>>
>> In order not having to build the host kernel with CONFIG_FRAME_POINTER,
>> save %rbp across a seamcall/tdcall.
> 
> There's a feature in TDX module 1.5 that prevents RBP modification across
> TDH.VP.ENTER SEAMCALL. See NO_RBP_MOD in TDX Module 1.5 ABI spec.
> 
> I think it has to be enabled for all TDs and TDX modules that don't
> support it need to be rejected.
> 

Yes, I know. I'm using the patch series:

   [PATCH v19 000/130] KVM TDX basic feature support

which I think does exactly that (see setup_tdparams() and tdx_module_setup()).

Nevertheless the clobbering happened, and saving/restoring %rbp made the
issue to go away. I suspect there is a path left still clobbering %rbp.

I was testing on an Emerald Rapids system:

# lscpu
Architecture:             x86_64
   CPU op-mode(s):         32-bit, 64-bit
   Address sizes:          47 bits physical, 57 bits virtual
   Byte Order:             Little Endian
CPU(s):                   256
   On-line CPU(s) list:    0-255
Vendor ID:                GenuineIntel
   BIOS Vendor ID:         Intel(R) Corporation
   Model name:             INTEL(R) XEON(R) PLATINUM 8592+
     BIOS Model name:      INTEL(R) XEON(R) PLATINUM 8592+  CPU @ 1.9GHz
     BIOS CPU family:      179
     CPU family:           6
     Model:                207
     Thread(s) per core:   2
     Core(s) per socket:   64
     Socket(s):            2
     Stepping:             2
...

BIOS version as printed during boot:

[    0.000000] DMI: Intel Corporation D50DNP/D50DNP, BIOS 
SE5C7411.86B.9535.D04.2312270518 12/27/2023


Juergen

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  reply	other threads:[~2024-05-17 14:08 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-17 12:14 [PATCH] x86/kvm/tdx: Save %rbp in TDX_MODULE_CALL Juergen Gross
2024-05-17 13:55 ` Kirill A. Shutemov
2024-05-17 14:08   ` Juergen Gross [this message]
2024-05-17 14:39     ` Kirill A. Shutemov
2024-05-17 14:41       ` Kirill A. Shutemov
2024-05-17 14:44       ` Juergen Gross
2024-05-17 15:16         ` Dave Hansen
2024-05-17 15:27           ` Jürgen Groß
2024-05-17 15:43             ` Dave Hansen
2024-05-17 15:48               ` Juergen Gross
2024-05-17 15:52                 ` Dave Hansen
2024-05-17 15:58                   ` Juergen Gross
2024-05-17 16:48                     ` Dave Hansen
2024-05-20 11:54                       ` Huang, Kai
2024-05-23  5:56                         ` Jürgen Groß
2024-05-23 10:30                           ` Huang, Kai
2024-05-23 12:26                             ` Huang, Kai
2024-05-23 12:43                               ` Jürgen Groß
2024-05-23 22:34                                 ` Huang, Kai
2024-05-23 23:28                                   ` Huang, Kai
2024-05-24  5:46                                   ` Jürgen Groß
2024-05-17 16:12   ` Sean Christopherson
2024-05-17 16:34     ` Dave Hansen
2024-05-17 17:01       ` Kirill A. Shutemov

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