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From: nicolas saenz julienne <nsaenz@kernel.org>
To: Florian Fainelli <f.fainelli@gmail.com>,
	Jeremy Linton <jeremy.linton@arm.com>,
	linux-pci@vger.kernel.org
Cc: lorenzo.pieralisi@arm.com, bhelgaas@google.com,
	rjw@rjwysocki.net, lenb@kernel.org, robh@kernel.org,
	kw@linux.com, bcm-kernel-feedback-list@broadcom.com,
	linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rpi-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/4] PCI: brcmstb: Add ACPI config space quirk
Date: Mon, 30 Aug 2021 19:17:32 +0200	[thread overview]
Message-ID: <f683df669b9e4e844f801182dc405fc83a4d9099.camel@kernel.org> (raw)
In-Reply-To: <f6860e38-c6fa-292d-f1a1-22b3e4b48f32@gmail.com>

On Mon, 2021-08-30 at 09:27 -0700, Florian Fainelli wrote:
> 
> On 8/30/2021 9:23 AM, Jeremy Linton wrote:
> > Hi,
> > 
> > On 8/30/21 3:36 AM, nicolas saenz julienne wrote:
> > > Hi Jeremy,
> > > sorry for the late reply, I've been on vacation.
> > > 
> > > On Thu, 2021-08-26 at 02:15 -0500, Jeremy Linton wrote:
> > > 
> > > [...]
> > > 
> > > > +static void __iomem *brcm_pcie_map_conf2(struct pci_bus *bus,
> > > > +                    unsigned int devfn, int where)
> > > > +{
> > > > +    struct pci_config_window *cfg = bus->sysdata;
> > > > +    void __iomem *base = cfg->win;
> > > > +    int idx;
> > > > +    u32 up;
> > > > +
> > > > +    /* Accesses to the RC go right to the RC registers if slot==0 */
> > > > +    if (pci_is_root_bus(bus))
> > > > +        return PCI_SLOT(devfn) ? NULL : base + where;
> > > > +
> > > > +    /*
> > > > +     * Assure the link is up before sending requests downstream. 
> > > > This is done
> > > > +     * to avoid sending transactions to EPs that don't exist. Link flap
> > > > +     * conditions/etc make this race more probable. The resulting 
> > > > unrecoverable
> > > > +     * SERRORs will result in the machine crashing.
> > > > +     */
> > > > +    up = readl(base + PCIE_MISC_PCIE_STATUS);
> > > > +    if (!(up & PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK))
> > > > +        return NULL;
> > > > +
> > > > +    if (!(up & PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK))
> > > > +        return NULL;
> > > 
> > > Couldn't this be integrated in the original brcm_pcie_map_conf()? IIUC 
> > > there is
> > > nothing ACPI specific about it. It'd also make for less code duplication.
> > 
> > That is where I started with this, but it wasn't the linkup check/etc 
> > which caused me to hoist it but the fact that if ACPI quirks are enabled 
> > they end up statically built into the kernel. While if this host bridge 
> > is enabled, it can end up being a module, and the resulting mess I 
> > created trying to satisfy the CONFIG variations. I'm not much of a fan 
> > of copy/paste programming, but that IMHO ended up being the cleanest here.
> > 
> 
> Agreed, the open coding that is being done is reasonable IHMO, although 
> we may have to update the link up code in both pcie-brcmstb.c and this 
> file in the future if offsets/bits do change, nothing impossible though.

Fair enough.

Acked-by: Nicolas Saenz Julienne <nsaenz@kernel.org>

Regards,
Nicolas


WARNING: multiple messages have this Message-ID (diff)
From: nicolas saenz julienne <nsaenz@kernel.org>
To: Florian Fainelli <f.fainelli@gmail.com>,
	Jeremy Linton <jeremy.linton@arm.com>,
	linux-pci@vger.kernel.org
Cc: lorenzo.pieralisi@arm.com, bhelgaas@google.com,
	rjw@rjwysocki.net,  lenb@kernel.org, robh@kernel.org,
	kw@linux.com,  bcm-kernel-feedback-list@broadcom.com,
	linux-acpi@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-rpi-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/4] PCI: brcmstb: Add ACPI config space quirk
Date: Mon, 30 Aug 2021 19:17:32 +0200	[thread overview]
Message-ID: <f683df669b9e4e844f801182dc405fc83a4d9099.camel@kernel.org> (raw)
In-Reply-To: <f6860e38-c6fa-292d-f1a1-22b3e4b48f32@gmail.com>

On Mon, 2021-08-30 at 09:27 -0700, Florian Fainelli wrote:
> 
> On 8/30/2021 9:23 AM, Jeremy Linton wrote:
> > Hi,
> > 
> > On 8/30/21 3:36 AM, nicolas saenz julienne wrote:
> > > Hi Jeremy,
> > > sorry for the late reply, I've been on vacation.
> > > 
> > > On Thu, 2021-08-26 at 02:15 -0500, Jeremy Linton wrote:
> > > 
> > > [...]
> > > 
> > > > +static void __iomem *brcm_pcie_map_conf2(struct pci_bus *bus,
> > > > +                    unsigned int devfn, int where)
> > > > +{
> > > > +    struct pci_config_window *cfg = bus->sysdata;
> > > > +    void __iomem *base = cfg->win;
> > > > +    int idx;
> > > > +    u32 up;
> > > > +
> > > > +    /* Accesses to the RC go right to the RC registers if slot==0 */
> > > > +    if (pci_is_root_bus(bus))
> > > > +        return PCI_SLOT(devfn) ? NULL : base + where;
> > > > +
> > > > +    /*
> > > > +     * Assure the link is up before sending requests downstream. 
> > > > This is done
> > > > +     * to avoid sending transactions to EPs that don't exist. Link flap
> > > > +     * conditions/etc make this race more probable. The resulting 
> > > > unrecoverable
> > > > +     * SERRORs will result in the machine crashing.
> > > > +     */
> > > > +    up = readl(base + PCIE_MISC_PCIE_STATUS);
> > > > +    if (!(up & PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK))
> > > > +        return NULL;
> > > > +
> > > > +    if (!(up & PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK))
> > > > +        return NULL;
> > > 
> > > Couldn't this be integrated in the original brcm_pcie_map_conf()? IIUC 
> > > there is
> > > nothing ACPI specific about it. It'd also make for less code duplication.
> > 
> > That is where I started with this, but it wasn't the linkup check/etc 
> > which caused me to hoist it but the fact that if ACPI quirks are enabled 
> > they end up statically built into the kernel. While if this host bridge 
> > is enabled, it can end up being a module, and the resulting mess I 
> > created trying to satisfy the CONFIG variations. I'm not much of a fan 
> > of copy/paste programming, but that IMHO ended up being the cleanest here.
> > 
> 
> Agreed, the open coding that is being done is reasonable IHMO, although 
> we may have to update the link up code in both pcie-brcmstb.c and this 
> file in the future if offsets/bits do change, nothing impossible though.

Fair enough.

Acked-by: Nicolas Saenz Julienne <nsaenz@kernel.org>

Regards,
Nicolas


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-08-30 17:17 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-26  7:15 [PATCH v3 0/4] CM4 ACPI PCIe quirk Jeremy Linton
2021-08-26  7:15 ` Jeremy Linton
2021-08-26  7:15 ` [PATCH v3 1/4] PCI: brcmstb: Break register definitions into separate header Jeremy Linton
2021-08-26  7:15   ` Jeremy Linton
2021-08-30  8:37   ` nicolas saenz julienne
2021-08-30  8:37     ` nicolas saenz julienne
2021-08-26  7:15 ` [PATCH v3 2/4] PCI: brcmstb: Add ACPI config space quirk Jeremy Linton
2021-08-26  7:15   ` Jeremy Linton
2021-08-30  8:36   ` nicolas saenz julienne
2021-08-30  8:36     ` nicolas saenz julienne
2021-08-30 16:23     ` Jeremy Linton
2021-08-30 16:23       ` Jeremy Linton
2021-08-30 16:27       ` Florian Fainelli
2021-08-30 16:27         ` Florian Fainelli
2021-08-30 17:17         ` nicolas saenz julienne [this message]
2021-08-30 17:17           ` nicolas saenz julienne
2021-10-05 15:32   ` Bjorn Helgaas
2021-10-05 15:32     ` Bjorn Helgaas
2021-10-05 15:57     ` Jeremy Linton
2021-10-05 15:57       ` Jeremy Linton
2021-10-05 19:43       ` Pali Rohár
2021-10-05 19:43         ` Pali Rohár
2021-10-05 22:25         ` Jeremy Linton
2021-10-05 22:25           ` Jeremy Linton
2021-10-06  2:07           ` Florian Fainelli
2021-10-06  2:07             ` Florian Fainelli
2021-10-22 17:04             ` Florian Fainelli
2021-10-22 17:04               ` Florian Fainelli
2021-10-22 17:17               ` Pali Rohár
2021-10-22 17:17                 ` Pali Rohár
2021-10-22 17:29                 ` Florian Fainelli
2021-10-22 17:29                   ` Florian Fainelli
2021-10-22 17:57                   ` Pali Rohár
2021-10-22 17:57                     ` Pali Rohár
2021-08-26  7:15 ` [PATCH v3 3/4] PCI/ACPI: Add Broadcom bcm2711 MCFG quirk Jeremy Linton
2021-08-26  7:15   ` Jeremy Linton
2021-08-30  8:37   ` nicolas saenz julienne
2021-08-30  8:37     ` nicolas saenz julienne
2021-09-13 16:12   ` Rafael J. Wysocki
2021-09-13 16:12     ` Rafael J. Wysocki
2021-10-05 15:10   ` Bjorn Helgaas
2021-10-05 15:10     ` Bjorn Helgaas
2021-10-05 15:43     ` Jeremy Linton
2021-10-05 15:43       ` Jeremy Linton
2021-10-05 22:31       ` Bjorn Helgaas
2021-10-05 22:31         ` Bjorn Helgaas
2021-10-05 23:32         ` Jeremy Linton
2021-10-05 23:32           ` Jeremy Linton
2021-10-05 20:02   ` Pali Rohár
2021-10-05 20:02     ` Pali Rohár
2021-10-05 22:44     ` Jeremy Linton
2021-10-05 22:44       ` Jeremy Linton
2021-08-26  7:15 ` [PATCH v3 4/4] MAINTAINERS: Widen brcmstb PCIe file scope Jeremy Linton
2021-08-26  7:15   ` Jeremy Linton
2021-08-30  8:38   ` nicolas saenz julienne
2021-08-30  8:38     ` nicolas saenz julienne

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