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Wed, 04 May 2022 06:07:54 -0700 (PDT) Received: from [172.30.1.41] ([14.32.163.5]) by smtp.gmail.com with ESMTPSA id h19-20020a63df53000000b003c14af50634sm15155679pgj.76.2022.05.04.06.07.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 May 2022 06:07:53 -0700 (PDT) Message-ID: Date: Wed, 4 May 2022 22:07:48 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH v3 12/12] arm64: dts: exynosautov9: switch ufs clock node Content-Language: en-US To: Chanho Park , Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski Cc: Sam Protsenko , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org References: <20220504075154.58819-1-chanho61.park@samsung.com> <20220504075154.58819-13-chanho61.park@samsung.com> From: Chanwoo Choi In-Reply-To: <20220504075154.58819-13-chanho61.park@samsung.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On 22. 5. 4. 16:51, Chanho Park wrote: > Use cmu_fsys's clock node instead of dummy ufs clock node. > > Signed-off-by: Chanho Park > --- > arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 14 ++------------ > 1 file changed, 2 insertions(+), 12 deletions(-) > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > index 68335fefa5f3..a8818b92e217 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > @@ -157,16 +157,6 @@ xtcxo: clock { > clock-frequency = <26000000>; > clock-output-names = "oscclk"; > }; > - > - /* > - * Keep the stub clock for ufs driver, until proper clock > - * driver is implemented. > - */ > - ufs_core_clock: ufs-core-clock { > - compatible = "fixed-clock"; > - #clock-cells = <0>; > - clock-frequency = <166562500>; > - }; > }; > > soc: soc@0 { > @@ -383,8 +373,8 @@ ufs_0: ufs0@17e00000 { > <0x17dc0000 0x2200>; /* 3: UFS protector */ > reg-names = "hci", "vs_hci", "unipro", "ufsp"; > interrupts = ; > - clocks = <&ufs_core_clock>, > - <&ufs_core_clock>; > + clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_ACLK>, > + <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_UNIPRO>; > clock-names = "core_clk", "sclk_unipro_main"; > freq-table-hz = <0 0>, <0 0>; > pinctrl-names = "default"; Reviewed-by: Chanwoo Choi -- Best Regards, Samsung Electronics Chanwoo Choi