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Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v4 4/6] xen/vpci: header: status register handler Content-Language: en-US To: Jan Beulich CC: =?UTF-8?Q?Roger_Pau_Monn=c3=a9?= , References: <20230828175858.30780-1-stewart.hildebrand@amd.com> <20230828175858.30780-5-stewart.hildebrand@amd.com> <4a082785-7da1-caf9-3193-eb0a9a77a7bc@suse.com> From: Stewart Hildebrand In-Reply-To: <4a082785-7da1-caf9-3193-eb0a9a77a7bc@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015CB:EE_|IA0PR12MB7651:EE_ X-MS-Office365-Filtering-Correlation-Id: 9646f3e0-5ffa-4a09-c479-08dbaa68da83 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Qkk7ljRqWmlDbL9FuVtDnqMByFhP6FVMpRH8lIuLf0jTjn8LQMizdqmNhWJoowXrz2q61EW8M19lrSncMeCJ+wQ44E3EtWwAA1ViITp762e2h0AZ3bLyntmEYp9ElwdDUMtby3ZSZiUbl+FFeoAeAjiOQ30UOv350Ktq52JyVqACAUJTDGhiIBvEHzfOg7cRSeZuQMM8IqyF7dwkgC056hgUKRLX8FUT22LYehS7bnStbPoVY9EvriwLP/ZN68Tk1QO8HqH5Uy10ayX44FYAvZDY9qnj3Rz08fLVMDm2YhmPHgYiLISkkqUMLzTn14dQlf/jPri+QCsdHZ03QZbQUQ8z6esdosRAAlW21OIpmmNS1eGufF9qJkKdjo7h2fPa4xGvkV0D/7vbBfFooSvQhwVTaA+DvaGTkuGtugHvqdo3MpRC0QBxDi0LCA23Z437hhroU6fVXruc0BXl3ueQlDak4RKt1Gq2hfJKjGwHG4kg3vUaaRA7E9OLY6WNBOCijSDKW1qrlVIiGujMLl8oecyanQeFdqdDzcU6naz6/PRTHpXLptpNsC5ubIFKzZakFyBBjHntlCRz1wFL6dOOGTlKsOpHFv5IAb9cxYlXRP0lJG69ZpugVw24+QK7FMXGh2q2xyEea0XEz5as95V8iio5DUgim2ISgDSpVZjMO+wARhmbAv3R8b8lmu/G90HnHYKgGrVSbEopY8YiKZ2A9e3zJObXtBfmm6ElOi8n1tR3L/fBe+xltIlhY02HP0grR9S8494H8Lkc/Zy2LeVgnz/TCLFpzgSiKwUOws1L2ufN9lRqdfsUyw7kgci2ezGy X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(396003)(346002)(376002)(136003)(1800799009)(186009)(451199024)(82310400011)(40470700004)(46966006)(36840700001)(82740400003)(31686004)(356005)(6666004)(40460700003)(36756003)(86362001)(36860700001)(81166007)(40480700001)(47076005)(31696002)(2616005)(2906002)(426003)(336012)(26005)(53546011)(83380400001)(478600001)(70586007)(70206006)(8936002)(54906003)(8676002)(4326008)(5660300002)(44832011)(41300700001)(16576012)(6916009)(316002)(36900700001)(43740500002);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 21:25:52.1821 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9646f3e0-5ffa-4a09-c479-08dbaa68da83 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015CB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7651 On 8/30/23 10:05, Jan Beulich wrote: > On 28.08.2023 19:56, Stewart Hildebrand wrote: >> --- a/xen/drivers/vpci/header.c >> +++ b/xen/drivers/vpci/header.c >> @@ -413,6 +413,18 @@ static void cf_check cmd_write( >> pci_conf_write16(pdev->sbdf, reg, cmd); >> } >> >> +static uint32_t cf_check status_read(const struct pci_dev *pdev, >> + unsigned int reg, void *data) >> +{ >> + struct vpci_header *header = data; >> + uint32_t status = pci_conf_read16(pdev->sbdf, reg); >> + >> + if ( header->mask_cap_list ) >> + status &= ~PCI_STATUS_CAP_LIST; >> + >> + return status; >> +} > > Imo we also cannot validly pass through any of the reserved bits. Doing so > is an option only once we know what purpose they might gain. OK. I think in the long term, having a res_mask in struct vpci_register for the reserved bits will be more flexible. > (In this > context I notice our set of PCI_STATUS_* constants isn't quite up-to-date.) I'll add these 2 new constants in the next version of the series (in a separate patch): #define PCI_STATUS_IMM_READY 0x01 /* Immediate Readiness */ #define PCI_STATUS_INTERRUPT 0x08 /* Interrupt status */ >> @@ -544,6 +556,11 @@ static int cf_check init_bars(struct pci_dev *pdev) >> if ( rc ) >> return rc; >> >> + rc = vpci_add_rw1c_register(pdev->vpci, status_read, vpci_hw_write16, >> + PCI_STATUS, 2, header, 0xF900); > > Rather than a literal number, imo this wants to be an OR of the respective > PCI_STATUS_* constants (which, if you like, could of course be consolidated > into a new PCI_STATUS_RW1C_MASK, to help readability). OK. >> @@ -167,6 +174,7 @@ int vpci_add_register(struct vpci *vpci, vpci_read_t *read_handler, >> r->size = size; >> r->offset = offset; >> r->private = data; >> + r->rw1c_mask = rw1c_mask; > > To avoid surprises with ... > >> @@ -424,6 +443,7 @@ static void vpci_write_helper(const struct pci_dev *pdev, >> uint32_t val; >> >> val = r->read(pdev, r->offset, r->private); >> + val &= ~r->rw1c_mask; >> data = merge_result(val, data, size, offset); > > ... the user of this field, should you either assert that no bits beyond > the field size are set, or simply mask to the respective number of bits? Good point, I'll mask it (in add_register()). Stew