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envelope-from=calebs@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Reviewed-by: Caleb Schlossin On 8/31/26 7:30 AM, Saif Abrar wrote: > From: Saif Abrar > > Add a method to reset the value of LSI Source-ID. > Mask off LSI source-id based on number of interrupts in the big/small PHB. > > Signed-off-by: Saif Abrar > Reviewed-by: Cédric Le Goater > Reviewed-by: Caleb Schlossin > Reviewed-by: Aditya Gupta > --- > hw/pci-host/pnv_phb4.c | 12 +++++++++--- > hw/pci-host/pnv_phb5.c | 17 ----------------- > include/hw/pci-host/pnv_phb5.h | 10 ++++------ > 3 files changed, 13 insertions(+), 26 deletions(-) > > diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c > index 5f84550a7c..362c9a039b 100644 > --- a/hw/pci-host/pnv_phb4.c > +++ b/hw/pci-host/pnv_phb4.c > @@ -491,6 +491,7 @@ static void pnv_phb4_update_xsrc(PnvPHB4 *phb) > > lsi_base = GETFIELD(PHB_LSI_SRC_ID, phb->regs[PHB_LSI_SOURCE_ID >> 3]); > lsi_base <<= 3; > + lsi_base &= (xsrc->nr_irqs - 1); > > /* TODO: handle reset values of PHB_LSI_SRC_ID */ > if (!lsi_base) { > @@ -1908,6 +1909,12 @@ static void pnv_phb4_ro_mask_init(PnvPHB4Class *phb4c) > /* TODO: Add more RO-masks as regs are implemented in the model */ > } > > +static void pnv_phb4_xsrc_reset(PnvPHB4 *phb) > +{ > + phb->regs[PHB_LSI_SOURCE_ID >> 3] = PPC_BITMASK(4, 12); > + pnv_phb4_update_xsrc(phb); > +} > + > static void pnv_phb4_err_reg_reset(PnvPHB4 *phb) > { > STICKY_RST(PHB_ERR_STATUS, 0, PPC_BITMASK(0, 33)); > @@ -1964,10 +1971,11 @@ static void pnv_phb4_reset(Object *obj, ResetType type) > PnvPHB4 *phb = PNV_PHB4(obj); > > pnv_phb4_pbl_core_reset(phb); > + > + pnv_phb4_xsrc_reset(phb); > pnv_phb4_err_reg_reset(phb); > pnv_phb4_pcie_stack_reg_reset(phb); > pnv_phb4_regb_err_reg_reset(phb); > - phb->regs[PHB_PCIE_CRESET >> 3] = 0xE000000000000000; > } > > static void pnv_phb4_instance_init(Object *obj) > @@ -2041,8 +2049,6 @@ void pnv_phb4_realize(DeviceState *dev, Error **errp) > return; > } > > - pnv_phb4_update_xsrc(phb); > - > phb->qirqs = qemu_allocate_irqs(xive_source_set_irq, xsrc, xsrc->nr_irqs); > > pnv_phb4_xscom_realize(phb); > diff --git a/hw/pci-host/pnv_phb5.c b/hw/pci-host/pnv_phb5.c > index b09351f69f..ec6dfbe2b2 100644 > --- a/hw/pci-host/pnv_phb5.c > +++ b/hw/pci-host/pnv_phb5.c > @@ -6,24 +6,7 @@ > * SPDX-License-Identifier: GPL-2.0-or-later > */ > > -#include "qemu/osdep.h" > -#include "qemu/log.h" > -#include "qemu/bswap.h" > -#include "qapi/visitor.h" > -#include "qapi/error.h" > -#include "target/ppc/cpu.h" > -#include "hw/pci-host/pnv_phb4_regs.h" > -#include "hw/pci-host/pnv_phb4.h" > #include "hw/pci-host/pnv_phb5.h" > -#include "hw/pci/pcie_host.h" > -#include "hw/pci/pcie_port.h" > -#include "hw/ppc/pnv.h" > -#include "hw/ppc/pnv_xscom.h" > -#include "hw/core/irq.h" > -#include "hw/core/qdev-properties.h" > -#include "qom/object.h" > -#include "trace.h" > -#include "system/reset.h" > > void pnv_phb5_cfg_core_reset(PCIDevice *d) > { > diff --git a/include/hw/pci-host/pnv_phb5.h b/include/hw/pci-host/pnv_phb5.h > index 4534083fd5..8f1df4892f 100644 > --- a/include/hw/pci-host/pnv_phb5.h > +++ b/include/hw/pci-host/pnv_phb5.h > @@ -9,12 +9,10 @@ > #ifndef PCI_HOST_PNV_PHB5_H > #define PCI_HOST_PNV_PHB5_H > > -#include "hw/pci-host/pnv_phb.h" > -#include "hw/pci/pci_bus.h" > -#include "hw/ppc/pnv.h" > -#include "hw/ppc/pnv_nest_pervasive.h" > -#include "hw/ppc/xive.h" > -#include "qom/object.h" > +#include "qemu/osdep.h" > +#include "qemu/log.h" > +#include "hw/pci-host/pnv_phb4_regs.h" > +#include "hw/pci-host/pnv_phb4.h" > > void pnv_phb5_cfg_core_reset(PCIDevice *d); >