From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 1/2] drm/i915: enable deepest RC6 state Date: Tue, 29 Nov 2011 13:01:31 +0000 Message-ID: References: <1322571305-1939-1-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A2FAA0B8E for ; Tue, 29 Nov 2011 05:01:51 -0800 (PST) In-Reply-To: <1322571305-1939-1-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Eugeni Dodonov List-Id: intel-gfx@lists.freedesktop.org On Tue, 29 Nov 2011 10:55:04 -0200, Eugeni Dodonov wrote: > This should allow even more energy saving when GPU is not in use. > According to the testing, this state results in around 0.1 - 0.4 W better > power usage. > > No issues or regressions observed so far, but additional testing is > certainly welcome. The docs I saw said "not implemented; do not use". Do we have it on good authority that this is safe and useful to enable? And doesn't it require programming of more transition thresholds? -Chris -- Chris Wilson, Intel Open Source Technology Centre