From: Shiju Jose <shiju.jose@huawei.com>
To: Borislav Petkov <bp@alien8.de>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
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Linuxarm <linuxarm@huawei.com>
Subject: RE: [PATCH v10 01/11] EDAC: Add generic EDAC RAS control feature driver
Date: Tue, 30 Jul 2024 17:01:17 +0000 [thread overview]
Message-ID: <f83a17db2c054483a450af73f7b9966b@huawei.com> (raw)
In-Reply-To: <20240730131611.GAZqjnm9D4ZJoGBIuZ@fat_crate.local>
>-----Original Message-----
>From: Borislav Petkov <bp@alien8.de>
>Sent: 30 July 2024 14:16
>To: Shiju Jose <shiju.jose@huawei.com>
>Cc: linux-edac@vger.kernel.org; linux-cxl@vger.kernel.org; linux-
>acpi@vger.kernel.org; linux-mm@kvack.org; linux-kernel@vger.kernel.org;
>tony.luck@intel.com; rafael@kernel.org; lenb@kernel.org;
>mchehab@kernel.org; dan.j.williams@intel.com; dave@stgolabs.net; Jonathan
>Cameron <jonathan.cameron@huawei.com>; dave.jiang@intel.com;
>alison.schofield@intel.com; vishal.l.verma@intel.com; ira.weiny@intel.com;
>david@redhat.com; Vilas.Sridharan@amd.com; leo.duran@amd.com;
>Yazen.Ghannam@amd.com; rientjes@google.com; jiaqiyan@google.com;
>Jon.Grimm@amd.com; dave.hansen@linux.intel.com;
>naoya.horiguchi@nec.com; james.morse@arm.com; jthoughton@google.com;
>somasundaram.a@hpe.com; erdemaktas@google.com; pgonda@google.com;
>duenwen@google.com; mike.malvestuto@intel.com; gthelen@google.com;
>wschwartz@amperecomputing.com; dferguson@amperecomputing.com;
>wbs@os.amperecomputing.com; nifan.cxl@gmail.com; tanxiaofei
><tanxiaofei@huawei.com>; Zengtao (B) <prime.zeng@hisilicon.com>; Roberto
>Sassu <roberto.sassu@huawei.com>; kangkang.shen@futurewei.com;
>wanghuiqiang <wanghuiqiang@huawei.com>; Linuxarm
><linuxarm@huawei.com>
>Subject: Re: [PATCH v10 01/11] EDAC: Add generic EDAC RAS control feature
>driver
>
>On Fri, Jul 26, 2024 at 05:05:45PM +0100, shiju.jose@huawei.com wrote:
>> From: Shiju Jose <shiju.jose@huawei.com>
>>
>> Add generic EDAC driver supports registering RAS features supported in
>> the system. The driver exposes feature's control attributes to the
>> userspace in /sys/bus/edac/devices/<dev-name>/<ras-feature>/
>>
>> Co-developed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>> Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
>> ---
>> drivers/edac/Makefile | 1 +
>> drivers/edac/edac_ras_feature.c | 181
>> +++++++++++++++++++++++++++++++ include/linux/edac_ras_feature.h |
>> 66 +++++++++++
>> 3 files changed, 248 insertions(+)
>> create mode 100755 drivers/edac/edac_ras_feature.c create mode
>> 100755 include/linux/edac_ras_feature.h
>>
>> diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile index
>> 9c09893695b7..c532b57a6d8a 100644
>> --- a/drivers/edac/Makefile
>> +++ b/drivers/edac/Makefile
>> @@ -10,6 +10,7 @@ obj-$(CONFIG_EDAC) := edac_core.o
>>
>> edac_core-y := edac_mc.o edac_device.o edac_mc_sysfs.o
>> edac_core-y += edac_module.o edac_device_sysfs.o wq.o
>> +edac_core-y += edac_ras_feature.o
>
>EDAC and RAS and feature?!
>
>Oh boy.
>
>EDAC == RAS.
>
>"feature" is silly.
>
>Looking at the code below, you're registering an EDAC device.
>- edac_ras_dev_register().
>
>So why isn't this thing in edac_device.c?
Sure. Then can I add definitions in edac_ras_feature.h to /linux/edac.h?
>
>> diff --git a/include/linux/edac_ras_feature.h
>> b/include/linux/edac_ras_feature.h
>> new file mode 100755
>> index 000000000000..8f0e0c47a617
>> --- /dev/null
>> +++ b/include/linux/edac_ras_feature.h
>> @@ -0,0 +1,66 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/*
>> + * EDAC RAS control features.
>> + *
>> + * Copyright (c) 2024 HiSilicon Limited.
>> + */
>> +
>> +#ifndef __EDAC_RAS_FEAT_H
>> +#define __EDAC_RAS_FEAT_H
>> +
>> +#include <linux/types.h>
>> +#include <linux/edac.h>
>> +
>> +#define EDAC_RAS_NAME_LEN 128
>> +
>> +enum edac_ras_feat {
>> + RAS_FEAT_SCRUB,
>> + RAS_FEAT_ECS,
>> + RAS_FEAT_MAX
>> +};
>> +
>> +struct edac_ecs_ex_info {
>> + u16 num_media_frus;
>> +};
>> +
>> +/*
>> + * EDAC RAS feature information structure */ struct edac_scrub_data
>> +{
>> + const struct edac_scrub_ops *ops;
>> + void *private;
>> +};
>> +
>> +struct edac_ecs_data {
>> + const struct edac_ecs_ops *ops;
>> + void *private;
>> +};
>
>So each "feature" would require a separate struct type?
>
>Why don't you define a *single* struct which accomodates any RAS
>functionality?
Done.
>
>Thx.
>
>--
>Regards/Gruss,
> Boris.
>
>https://people.kernel.org/tglx/notes-about-netiquette
>
Thanks,
Shiju
next prev parent reply other threads:[~2024-07-30 17:01 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-26 16:05 [PATCH v10 00/11] EDAC: Scrub: introduce generic EDAC RAS control feature driver + CXL/ACPI-RAS2 drivers shiju.jose
2024-07-26 16:05 ` [PATCH v10 01/11] EDAC: Add generic EDAC RAS control feature driver shiju.jose
2024-07-30 13:16 ` Borislav Petkov
2024-07-30 17:01 ` Shiju Jose [this message]
2024-07-26 16:05 ` [PATCH v10 02/11] EDAC: Add EDAC scrub control driver shiju.jose
2024-07-26 16:05 ` [PATCH v10 03/11] EDAC: Add EDAC ECS " shiju.jose
2024-07-26 16:05 ` [PATCH v10 04/11] cxl/mbox: Add GET_SUPPORTED_FEATURES mailbox command shiju.jose
2024-07-26 16:05 ` [PATCH v10 05/11] cxl/mbox: Add GET_FEATURE " shiju.jose
2024-07-26 16:05 ` [PATCH v10 06/11] cxl/mbox: Add SET_FEATURE " shiju.jose
2024-07-26 16:05 ` [PATCH v10 07/11] cxl/memscrub: Add CXL memory device patrol scrub control feature shiju.jose
2024-07-26 16:05 ` [PATCH v10 08/11] cxl/memscrub: Add CXL memory device ECS " shiju.jose
2024-07-26 16:05 ` [PATCH v10 09/11] platform: Add __free() based cleanup function for platform_device_put shiju.jose
2024-07-26 16:05 ` [PATCH v10 10/11] ACPI:RAS2: Add ACPI RAS2 driver shiju.jose
2024-07-26 16:05 ` [PATCH v10 11/11] ras: scrub: ACPI RAS2: Add memory " shiju.jose
2024-07-29 22:18 ` Fan Ni
2024-07-30 8:26 ` Shiju Jose
2024-07-30 21:00 ` [PATCH v10 00/11] EDAC: Scrub: introduce generic EDAC RAS control feature driver + CXL/ACPI-RAS2 drivers Fan Ni
2024-07-31 11:28 ` Shiju Jose
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