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[46.204.108.92]) by smtp.gmail.com with ESMTPSA id p12-20020a19f00c000000b004d37d647637sm1659755lfc.64.2023.02.24.07.19.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 07:19:28 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a21e9a3b-b456-11ed-88bb-e56d68cac8db DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:user-agent:content-transfer-encoding:references :in-reply-to:date:cc:to:from:subject:message-id:from:to:cc:subject :date:message-id:reply-to; bh=uTp/HMRYAQd1DwVBw1+20SdFpWuT2ZnHUkCVqPOj3B4=; b=S8m4uFt0gyNcYBN7JKaAwKnagPYIpKWWi954ckZj2AQJEr3BcFQMYCvdQATKL8oYkc dB1/RScK+SaT1afmX3OGkYLERAXGiidUJ5hCezkWFJl3eRx5XR8M25yTj0t7bUf0mWA2 78KZumpwug3A9oeIXaINTS/ufpCh/mXHKhZzJCG7f+erdtj0WHjGXiDcvhWJVk6jBUPD WTj67PT3hEG2+FysoIXnj+R7w9mK98F13VALQfAKVZ14dEWXlc5mHFIC2Z+FEV+PatpD 5Ewg8roZHNNjYYClkBGDfYg5q5PP+8PDwMfXn+e7xAuJSW+NGCuIUy4/ld18B+2vgdY1 Wxhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=mime-version:user-agent:content-transfer-encoding:references :in-reply-to:date:cc:to:from:subject:message-id:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=uTp/HMRYAQd1DwVBw1+20SdFpWuT2ZnHUkCVqPOj3B4=; b=2qUNKJ2ejLMgoNKS64kPo0gEbC4WHAGe8+Cg/TOH0JPZmRU1pR1O2Hwaf9Hp0oGIVO k40zK8HHh5yRMRglAFXlCTXqtNY07Gj2IpCfDDyitAtUpJe/k+ROHe23GhbqsT+HJJ/K bpBxDSD4MT/g1WPVhpD92KxTkTnUUsbSxQ0MwboIJLy/n3572aJ8S8gcj5ujaJXtFSZH BHxfgc2esWjBhw7s2eN6srXMZdLfko15Z7Ripk4Zi98MbbL4dCpDxVG6slHELqk+bSOY QHPF4FY/alxCuMh+3M1XGaRiaaBmdEFmp1KscAjIm364dbubVC2hi+r6JFLc6BzymQZu Nmmg== X-Gm-Message-State: AO0yUKVowZBpvwsH7OPlgJK4p8bjuCeGdYsgaVExc7fILFdCx0JhY8zz OgLiRYXLHO6Y5NpjswoB41xloAjIIgU= X-Google-Smtp-Source: AK7set+0V2dO8X2K/e39nRGCviU66TuccHz6SxamHU1cvzMTT013sN4coJoUNdlLi5+1cSEtflQRkg== X-Received: by 2002:a05:6512:3b0d:b0:4da:ffa0:3f21 with SMTP id f13-20020a0565123b0d00b004daffa03f21mr26212lfv.14.1677251969220; Fri, 24 Feb 2023 07:19:29 -0800 (PST) Message-ID: Subject: Re: [PATCH v1 0/3] enable MMU for RISC-V From: Oleksii To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Stefano Stabellini , Gianluca Guida , Bob Eshleman , Alistair Francis , Connor Davis , Doug Goldstein Date: Fri, 24 Feb 2023 17:19:26 +0200 In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.3 (3.46.3-1.fc37) MIME-Version: 1.0 On Fri, 2023-02-24 at 17:06 +0200, Oleksii Kurochko wrote: > The patch series introduces the following things: > 1. Functionality to build the page tables for Xen that map the > =C2=A0=C2=A0 following: > =C2=A0=C2=A0=C2=A0=C2=A0 * The physical location of Xen (where the bootlo= ader loaded it) > =C2=A0=C2=A0=C2=A0=C2=A0 * The link-time location of Xen (where the linke= r expected Xen's > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 addresses to be. > 2. Load the built page table into the SATP > 3. Enables MMU. > 4. Updates smoke test to grep message which should be printed after > =C2=A0=C2=A0 MMU is enabled. >=20 > Oleksii Kurochko (3): > =C2=A0 xen/riscv: introduce setup_initial_pages > =C2=A0 xen/riscv: setup initial pagetables > =C2=A0 automation: update RISC-V smoke test >=20 > =C2=A0automation/scripts/qemu-smoke-riscv64.sh |=C2=A0=C2=A0 2 +- > =C2=A0xen/arch/riscv/Makefile=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0 = 1 + > =C2=A0xen/arch/riscv/include/asm/mm.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0 9 + > =C2=A0xen/arch/riscv/include/asm/page.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 |=C2=A0 90 +++++++++ > =C2=A0xen/arch/riscv/mm.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 | 223 > +++++++++++++++++++++++ > =C2=A0xen/arch/riscv/setup.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 11 = ++ > =C2=A06 files changed, 335 insertions(+), 1 deletion(-) > =C2=A0create mode 100644 xen/arch/riscv/include/asm/mm.h > =C2=A0create mode 100644 xen/arch/riscv/include/asm/page.h > =C2=A0create mode 100644 xen/arch/riscv/mm.c >=20 I forgot to mention in cover letter that the patch series is based on top of 'introduce generic implementation of macros from bug.h' and 'RISCV basic exception handling implementation' patch series.