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From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Xin Li <xin@zytor.com>, Binbin Wu <binbin.wu@linux.intel.com>
Cc: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Borislav Petkov <bp@alien8.de>
Subject: Re: [PATCH v3 4/6] KVM: x86: Add support for RDMSR/WRMSRNS w/ immediate on Intel
Date: Mon, 1 Sep 2025 15:22:45 +0800	[thread overview]
Message-ID: <fbdcca61-e9c4-47fc-b629-7a46ad35cd24@intel.com> (raw)
In-Reply-To: <c4bc61da-c42c-453d-b484-f970b99cb616@zytor.com>

On 9/1/2025 3:04 PM, Xin Li wrote:
> On 8/31/2025 11:34 PM, Binbin Wu wrote:
>>> We need to inject #UD for !guest_cpu_has(X86_FEATURE_MSR_IMM)
>>>
>>
>> Indeed.
> 
> Good catch!
> 
>>
>> There is a virtualization hole of this feature for the accesses to the 
>> MSRs not
>> intercepted. IIUIC, there is no other control in VMX for this feature. 
>> If the
>> feature is supported in hardware, the guest will succeed when it 
>> accesses to the
>> MSRs not intercepted even when the feature is not exposed to the 
>> guest, but the
>> guest will get #UD when access to the MSRs intercepted if KVM injects 
>> #UD.
> 
> hpa mentioned this when I just started the work.  But I managed to forget
> it later... Sigh!
> 
>>
>> But I guess this is the guest's fault by not following the CPUID, KVM 
>> should
>> still follow the spec?
> 
> I think we should still inject #UD when a MSR is intercepted by KVM.
> 

For handle_wrmsr_imm(), it seems we need to check 
guest_cpu_cap_has(X86_FEATURE_WRMSRNS) as well, since immediate form of 
MSR write is only supported on WRMSRNS instruction.

It leads to another topic, do we need to bother checking the opcode of 
the instruction on EXIT_REASON_MSR_WRITE and inject #UD when it is 
WRMSRNS instuction and !guest_cpu_cap_has(X86_FEATURE_WRMSRNS)?

WRMSRNS has virtualization hole as well, but KVM at least can emulate 
the architectural behavior when the write on MSRs are not pass through.

  reply	other threads:[~2025-09-01  7:25 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-05 20:22 [PATCH v3 0/6] KVM: VMX: Handle the immediate form of MSR instructions Sean Christopherson
2025-08-05 20:22 ` [PATCH v3 1/6] x86/cpufeatures: Add a CPU feature bit for MSR immediate form instructions Sean Christopherson
2025-08-05 20:22 ` [PATCH v3 2/6] KVM: x86: Rename local "ecx" variables to "msr" and "pmc" as appropriate Sean Christopherson
2025-08-06 15:42   ` Xin Li
2025-08-05 20:22 ` [PATCH v3 3/6] KVM: x86: Rename handle_fastpath_set_msr_irqoff() to handle_fastpath_wrmsr() Sean Christopherson
2025-08-06 15:48   ` Xin Li
2025-08-05 20:22 ` [PATCH v3 4/6] KVM: x86: Add support for RDMSR/WRMSRNS w/ immediate on Intel Sean Christopherson
2025-09-01  4:13   ` Xiaoyao Li
2025-09-01  6:34     ` Binbin Wu
2025-09-01  7:04       ` Xin Li
2025-09-01  7:22         ` Xiaoyao Li [this message]
2025-09-02 14:50           ` Sean Christopherson
2025-09-02 15:46             ` Xin Li
2025-09-03  4:43             ` Xiaoyao Li
2025-09-18 18:33               ` Sean Christopherson
2025-08-05 20:22 ` [PATCH v3 5/6] KVM: VMX: Support the immediate form of WRMSRNS in the VM-Exit fastpath Sean Christopherson
2025-08-05 20:22 ` [PATCH v3 6/6] KVM: x86: Advertise support for the immediate form of MSR instructions Sean Christopherson
2025-08-06 15:38 ` [PATCH v3 0/6] KVM: VMX: Handle " Xin Li
2025-08-19 23:12 ` Sean Christopherson

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