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Wed, 09 Sep 2026 06:37:36 -0700 (PDT) X-Received: by 2002:a05:6122:6b14:b0:5c3:a1f5:7569 with SMTP id 71dfb90a1353d-5c8148141a8mr3923741e0c.1.1788961056058; Wed, 09 Sep 2026 06:37:36 -0700 (PDT) Received: from [192.168.202.12] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5b7673bd6e5sm438764e87.22.2026.09.09.06.37.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 09 Sep 2026 06:37:35 -0700 (PDT) Message-ID: Date: Wed, 9 Sep 2026 15:37:32 +0200 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] clk: qcom: ipq-cmn-pll: keep the CMN block bus clocks enabled To: Stanislaw Pal , Jie Luo , Kathiravan Thirumoorthy Cc: Mieczyslaw Nalewaj , Bjorn Andersson , Stephen Boyd , Michael Turquette , Georg Seema , Brian Masney , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260909132049.37611-1-kuncy7@gmail.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260909132049.37611-1-kuncy7@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 7a_w0o3F4aTG1zbs15B1gsysg0tDgBf1 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA5MDE1MiBTYWx0ZWRfX6pdtru8Bu1KU xGW/vDGT8/3emBK0r0Nt1l3HLtOWQAkxkgOpzLqA3rd3BB6ERiAxDY/UBG5LNWoskrkU1GeGZ2W NTHiQWifq5s0NVthWAvErf+ULqrDlOo= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA5MDE1MiBTYWx0ZWRfX5ufOQk0tAFr0 qHk1lOIjhCIWi/4Q3uWOVeQylIFQEkUCmtH+APXYzCwKWWwIaI3WS4AKviDnzDuKT/8RRZpdfP7 NaGxYzWTRMOAQKZXX42Gd7ZVNOduoScUALs1tj2ASkd/lJQ9sji1w9jPHx+VHqSeNCZSJGMu//C HNKMVBSzrPAlnygN6gFuMEnK5h+PYiiKY1d71We7xRwO53YPNHvkCPkkzHQd2S2Wy39rSO3S0w5 22CtEQz6Q8MQLFdfbPQrINuEtF5CvetfkA/CRpJK7VdfY+qIEsVwznNoa79z0IsciG42r+5O4nZ y7f4DdiCWIPR9k6xEVHUGrzk8PiLJKppY9nTX/RXUOX0B/2GfDkCDbVWM71LR36Cmg5r5D/dHuR JBNA0ASHD03OCGvS0lB1t+h/QN9t8Qoknvh//YpcMLrmJew5JPbzFEXK31rcQo8xwx/ljNxpUfT 35d/Mum7lMAOwIsZGLQ== X-Authority-Analysis: v=2.4 cv=S+jpBosP c=1 sm=1 tr=0 ts=6aa16121 cx=c_pps a=JIY1xp/sjQ9K5JH4t62bdg==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=oVlbBDgyKwfZh0hzoKgA:9 a=QEXdDO2ut3YA:10 a=tNoRWFLymzeba-QzToBc:22 X-Proofpoint-ORIG-GUID: 7a_w0o3F4aTG1zbs15B1gsysg0tDgBf1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-08_03,2026-09-09_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 impostorscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609090152 On 9/9/26 3:20 PM, Stanislaw Pal wrote: > On 9/9/26 2:12 PM, Konrad Dybcio wrote: >> Is it only the UNIPHY consuming the 50 MHz one? >> >> What consumes the XO clock? What consumes the sleep clock? > > Nothing in Linux consumes any of the three today. Yes, that's more than clear :) I'm trying to ask Jie about the platform details, to which I unfortunately don't have access at the moment.. or maybe +Kathiravan? [...] > I would rather this did not decide the patch, though, because the > failure it fixes is not a later register access to the CMN block. > Mieczyslaw's summary in the v4 thread put it that way; the mechanism I > measured is narrower, and it is what the v4 commit message describes: > > - gating those same two clocks on an idle, fully booted GL-B3000 > (runtime PM autosuspend, gate landing ~75 s after probe) is > harmless - runtime_status "suspended", both radios still serving > clients; > - with UNIPHY0 disabled in the device tree, so that no uniphy driver > exists in that boot at all, the board still dies in 6 of 7 boots; > - stretching the end of probe by 15 ms, or by a full 2 s, still ends > in a watchdog reset, 8 of 8 boots each. > > So what hangs the SoC is the gate transition landing amid early-boot > bus activity, not any consumer's access afterwards. I would be more inclined to believe it's racing against some other driver enabling/disabling something else, perhaps a register that depends on a clock derived from these two. When that crash occurs does the device enter crashdump mode (USB PID 0x900e)? Konrad