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Wed, 19 Aug 2020 08:27:39 -0700 (PDT) Subject: Re: [PATCH] ARM: dts: BCM5301X: Fix pin controller node To: Florian Fainelli , linux-arm-kernel@lists.infradead.org References: <20200819042308.19043-1-f.fainelli@gmail.com> From: Ray Jui Message-ID: Date: Wed, 19 Aug 2020 08:27:36 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <20200819042308.19043-1-f.fainelli@gmail.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200819_112751_846868_C84B76F6 X-CRM114-Status: GOOD ( 20.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Christian Lamparter , Hauke Mehrtens , =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , open list , Rob Herring , "maintainer:BROADCOM BCM5301X ARM ARCHITECTURE" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/18/2020 9:23 PM, Florian Fainelli wrote: > The pin controller resources start at 0xc0 from the CRU base which is at > 0x100 from th DMU base, for a final address of 0x1800_c1c0, whereas we > are currently off by 0x100. The resource size of the CRU is also > incorrect and should end at 0x248 bytes from 0x100 which is the start > address. Finally, the compatibility strings defined for the > pin-controller node should reflect the SoC being used. > > Fixes: 9994241ac97c ("ARM: dts: BCM5301X: Describe Northstar pins mux controller") > Reported-by: Christian Lamparter > Signed-off-by: Florian Fainelli > --- > Christian, can you test this as a preliminary patch for your Cisco > Meraki MR32 series? Thanks! > > arch/arm/boot/dts/bcm4708.dtsi | 4 ++++ > arch/arm/boot/dts/bcm4709.dtsi | 4 ++++ > arch/arm/boot/dts/bcm5301x.dtsi | 8 ++++---- > 3 files changed, 12 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/boot/dts/bcm4708.dtsi b/arch/arm/boot/dts/bcm4708.dtsi > index 1a19e97a987d..5064fe51e402 100644 > --- a/arch/arm/boot/dts/bcm4708.dtsi > +++ b/arch/arm/boot/dts/bcm4708.dtsi > @@ -43,6 +43,10 @@ cpu@1 { > > }; > > +&pinctrl { > + compatible = "brcm,bcm4708-pinmux"; > +}; > + > &uart0 { > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/bcm4709.dtsi b/arch/arm/boot/dts/bcm4709.dtsi > index e1bb8661955f..7417c275ea9d 100644 > --- a/arch/arm/boot/dts/bcm4709.dtsi > +++ b/arch/arm/boot/dts/bcm4709.dtsi > @@ -5,6 +5,10 @@ > > #include "bcm4708.dtsi" > > +&pinctrl { > + compatible = "brcm,bcm4709-pinmux"; > +}; > + > &uart0 { > clock-frequency = <125000000>; > status = "okay"; > diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi > index 2d9b4dd05830..bf49943f504a 100644 > --- a/arch/arm/boot/dts/bcm5301x.dtsi > +++ b/arch/arm/boot/dts/bcm5301x.dtsi > @@ -402,14 +402,14 @@ dmu@1800c000 { > > cru@100 { > compatible = "simple-bus"; > - reg = <0x100 0x1a4>; > + reg = <0x100 0x248>; > ranges; > #address-cells = <1>; > #size-cells = <1>; > > - pin-controller@1c0 { > - compatible = "brcm,bcm4708-pinmux"; > - reg = <0x1c0 0x24>; > + pinctrl: pin-controller@c0 { > + compatible = "brcm,bcm53012-pinmux"; > + reg = <0xc0 0x24>; > reg-names = "cru_gpio_control"; > > spi-pins { > Reviewed-by: Ray Jui _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B80BBC433E1 for ; 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Wed, 19 Aug 2020 08:27:39 -0700 (PDT) Received: from [10.136.8.253] ([192.19.228.250]) by smtp.gmail.com with ESMTPSA id s6sm3377091pjn.48.2020.08.19.08.27.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Aug 2020 08:27:39 -0700 (PDT) Subject: Re: [PATCH] ARM: dts: BCM5301X: Fix pin controller node To: Florian Fainelli , linux-arm-kernel@lists.infradead.org Cc: Christian Lamparter , Hauke Mehrtens , =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , "maintainer:BROADCOM BCM5301X ARM ARCHITECTURE" , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list References: <20200819042308.19043-1-f.fainelli@gmail.com> From: Ray Jui Message-ID: Date: Wed, 19 Aug 2020 08:27:36 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <20200819042308.19043-1-f.fainelli@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 8/18/2020 9:23 PM, Florian Fainelli wrote: > The pin controller resources start at 0xc0 from the CRU base which is at > 0x100 from th DMU base, for a final address of 0x1800_c1c0, whereas we > are currently off by 0x100. The resource size of the CRU is also > incorrect and should end at 0x248 bytes from 0x100 which is the start > address. Finally, the compatibility strings defined for the > pin-controller node should reflect the SoC being used. > > Fixes: 9994241ac97c ("ARM: dts: BCM5301X: Describe Northstar pins mux controller") > Reported-by: Christian Lamparter > Signed-off-by: Florian Fainelli > --- > Christian, can you test this as a preliminary patch for your Cisco > Meraki MR32 series? Thanks! > > arch/arm/boot/dts/bcm4708.dtsi | 4 ++++ > arch/arm/boot/dts/bcm4709.dtsi | 4 ++++ > arch/arm/boot/dts/bcm5301x.dtsi | 8 ++++---- > 3 files changed, 12 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/boot/dts/bcm4708.dtsi b/arch/arm/boot/dts/bcm4708.dtsi > index 1a19e97a987d..5064fe51e402 100644 > --- a/arch/arm/boot/dts/bcm4708.dtsi > +++ b/arch/arm/boot/dts/bcm4708.dtsi > @@ -43,6 +43,10 @@ cpu@1 { > > }; > > +&pinctrl { > + compatible = "brcm,bcm4708-pinmux"; > +}; > + > &uart0 { > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/bcm4709.dtsi b/arch/arm/boot/dts/bcm4709.dtsi > index e1bb8661955f..7417c275ea9d 100644 > --- a/arch/arm/boot/dts/bcm4709.dtsi > +++ b/arch/arm/boot/dts/bcm4709.dtsi > @@ -5,6 +5,10 @@ > > #include "bcm4708.dtsi" > > +&pinctrl { > + compatible = "brcm,bcm4709-pinmux"; > +}; > + > &uart0 { > clock-frequency = <125000000>; > status = "okay"; > diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi > index 2d9b4dd05830..bf49943f504a 100644 > --- a/arch/arm/boot/dts/bcm5301x.dtsi > +++ b/arch/arm/boot/dts/bcm5301x.dtsi > @@ -402,14 +402,14 @@ dmu@1800c000 { > > cru@100 { > compatible = "simple-bus"; > - reg = <0x100 0x1a4>; > + reg = <0x100 0x248>; > ranges; > #address-cells = <1>; > #size-cells = <1>; > > - pin-controller@1c0 { > - compatible = "brcm,bcm4708-pinmux"; > - reg = <0x1c0 0x24>; > + pinctrl: pin-controller@c0 { > + compatible = "brcm,bcm53012-pinmux"; > + reg = <0xc0 0x24>; > reg-names = "cru_gpio_control"; > > spi-pins { > Reviewed-by: Ray Jui