From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mga17.intel.com ([192.55.52.151]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fDFf5-0005JC-CV for speck@linutronix.de; Mon, 30 Apr 2018 22:44:39 +0200 Subject: [MODERATED] Re: [patch V7 15/15] SBB 15 References: <20180429193045.711908246@linutronix.de> <20180429193938.717571156@linutronix.de> <20180430202028.GB18388@char.us.oracle.com> From: Tim Chen Message-ID: Date: Mon, 30 Apr 2018 13:44:36 -0700 MIME-Version: 1.0 In-Reply-To: <20180430202028.GB18388@char.us.oracle.com> Content-Type: multipart/mixed; boundary="zma7OGn9A7gQ1aJA1I931hUz8nbA5D7Tp"; protected-headers="v1" To: speck@linutronix.de List-ID: This is an OpenPGP/MIME encrypted message (RFC 4880 and 3156) --zma7OGn9A7gQ1aJA1I931hUz8nbA5D7Tp Content-Type: multipart/mixed; boundary="m75f5bbPG8Pz613BofLWLAJZKhFLjI9KL" --m75f5bbPG8Pz613BofLWLAJZKhFLjI9KL Content-Type: text/plain; charset=windows-1252 Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 04/30/2018 01:20 PM, speck for Konrad Rzeszutek Wilk wrote: > On Mon, Apr 30, 2018 at 01:12:28PM -0700, speck for Tim Chen wrote: >> On 04/30/2018 12:36 PM, speck for Thomas Gleixner wrote: >>> On Mon, 30 Apr 2018, speck for Tim Chen wrote: >>> >>>> On 04/29/2018 12:31 PM, speck for Thomas Gleixner wrote: >>>> >>>>> +static int sbb_prctl_set(unsigned long ctrl) >>>>> +{ >>>>> + bool rds =3D !!test_tsk_thread_flag(current, TIF_RDS); >>>>> + >>>>> + if (ssb_mode !=3D SPEC_STORE_BYPASS_PRCTL) >>>>> + return -ENXIO; >>>> >>>> Perhaps we should not use the prctl if we don't have >>>> the SSB bug. Something like: >>>> >>>> if (ssb_mode !=3D SPEC_STORE_BYPASS_PRCTL || >>>> !boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS)) >>>> return -ENXIO;=20 >>> >>> What? If the CPU does not have the bug then the kernel does not enabl= e >>> PRCTL mode at all unless >>> >>> 1) RDS is available >>> >>> AND >>> >>> 2) The user enforced PRTCL mode on the kernel command line. >>> >>> So what exactly are you trying to solve? >> >> Right, we will only do the PRCTL only for the case when >> admin explicitly ask for it at kernel command line. >=20 > No. It will be automatically enabled. That is the '=3Dauto' If the CPU doesn't have the bug, the auto case will default to SPEC_STORE_BYPASS_CMD_NONE. So I'm not concerned about that case. if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS) && (cmd =3D=3D SPEC_STORE_BYPASS_CMD_NONE || cmd =3D=3D SPEC_STORE_BYPASS_CMD_AUTO)) return mode; The case that's of interest is the prctl case on command line and cpu doe= sn't have the bug. So if I understand Thomas' reply, we allow the setting of MSR for that case (though unnecessary), as the admin explicitl= y asked for it. Thanks. Tim > sets prctl by default on Intel... You know why don't I just > paste to you the code: >=20 > 477 switch (cmd) { = =20 > 478 case SPEC_STORE_BYPASS_CMD_AUTO: = =20 > 479 /* = =20 > 480 * AMD platforms by default don't need SSB mitigati= on. =20 > 481 */ = =20 > 482 if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD)= =20 > 483 break; = =20 > 484 /* Choose prctl as the default mode */ = =20 > 485 mode =3D SPEC_STORE_BYPASS_PRCTL; = =20 > 486 break; = =20 >=20 >=20 >> >> We'll let the admin have the choice to do prctl, if he >> explicitly ask for it. Even though it >> is unnecessary for cpus that don't have the SSB bug and >> there will be some added cost in changing the MSR on context >> switches. Just want to clear in my mind that this is the choice >> we are making. >> >> Tim >=20 >=20 --m75f5bbPG8Pz613BofLWLAJZKhFLjI9KL-- --zma7OGn9A7gQ1aJA1I931hUz8nbA5D7Tp--