From: "Souza, Jose" <jose.souza@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"Kahola, Mika" <mika.kahola@intel.com>,
"Hogander, Jouni" <jouni.hogander@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/psr2: Do full fetches when doing async flips
Date: Thu, 28 Oct 2021 17:02:41 +0000 [thread overview]
Message-ID: <ff05e4fa04fe0ebcc79c9b86e249bd5ab5392529.camel@intel.com> (raw)
In-Reply-To: <YXqmfPPnSr3j/mDe@intel.com>
On Thu, 2021-10-28 at 16:32 +0300, Ville Syrjälä wrote:
> On Wed, Oct 27, 2021 at 11:48:55AM -0700, José Roberto de Souza wrote:
> > Async flips are not supported by selective fetch and we had a check
> > for that but that check was only executed when doing modesets.
> > So moving this check to the page flip path, so it can be properly
> > handled.
> >
> > This fix a failure in kms_async_flips@test-cursor.
> >
> > Cc: Mika Kahola <mika.kahola@intel.com>
> > Cc: Jouni Hogander <jouni.hogander@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 8 ++------
> > 1 file changed, 2 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 8d08e3cf08c1f..ce6850ed72c60 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -729,12 +729,6 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp,
> > return false;
> > }
> >
> > - if (crtc_state->uapi.async_flip) {
> > - drm_dbg_kms(&dev_priv->drm,
> > - "PSR2 sel fetch not enabled, async flip enabled\n");
> > - return false;
> > - }
> > -
> > /* Wa_14010254185 Wa_14010103792 */
> > if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_C0)) {
> > drm_dbg_kms(&dev_priv->drm,
> > @@ -1592,6 +1586,8 @@ static bool psr2_sel_fetch_pipe_state_supported(const struct intel_crtc_state *c
> > {
> > if (crtc_state->scaler_state.scaler_id >= 0)
> > return false;
> > + if (crtc_state->uapi.async_flip)
> > + return false;
>
> This looks dodgy. Pretty sure we can't turn off this thing during
> an async flip. So I think the correct short term fix is to not do
> async flips with psr2 enabled. The longer term fix would involve
> using the same approach Stan is preparing for the async flip
> watermark tweaking, which is to convert the first async flip into
> a sync flip.
>
It is not turning PSR2 off, it is telling hardware to fetch the whole memory of all planes and send the whole screen to panel instead of fetching and
sending a smaller area for this frame, we also do that when a plane is moved to a negative coordinate.
next prev parent reply other threads:[~2021-10-28 17:02 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-27 18:48 [Intel-gfx] [PATCH] drm/i915/psr2: Do full fetches when doing async flips José Roberto de Souza
2021-10-27 21:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-10-28 4:53 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-28 5:59 ` [Intel-gfx] [PATCH] " Karthik B S
2021-10-28 13:32 ` Ville Syrjälä
2021-10-28 17:02 ` Souza, Jose [this message]
2021-10-28 17:38 ` Ville Syrjälä
2021-10-28 17:43 ` Souza, Jose
2021-10-28 17:46 ` Ville Syrjälä
2021-10-28 20:18 ` Souza, Jose
2021-10-29 6:22 ` Ville Syrjälä
2021-10-29 22:55 ` Souza, Jose
2021-10-30 0:15 ` Souza, Jose
2021-10-28 21:40 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/psr2: Do full fetches when doing async flips (rev3) Patchwork
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