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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: R5uTtwxr+8zbgFAYJ8IRM0AVkiT1cOLETwUoqAnHDFOBDGHAraJsUTJpiUzr4s1X0E4VPuE7wb481jLVMn6Y4P9WNDpd2o6xxGwLZpjAJitZNAkpTWQMss/9y71NWwnrBK6WeFZn8DIqikVVnOtKY7v8HjK/Lf3kFiER1RW/Yj5UsZHH8J5QmpUuv9lQg5uiuHCn0nTk3ryCUuiurnerrCz9GwUIw6cbBDSlZOXYFWIxrLVrJtBtEQ5znJ2b2DYfUPaB/zGhuHhxB217XbVfVC/PNBpo4bept2KR1n07kr3yLeY189ChlO++NCkqQ+9HotFGuTbJXu90j05T7XEim7FJe5nAae7EarnmhlOsnoPpuBmpIOL23Hq8LZa+sdXNrhRTnBFGwnu9d+Yse++k1qZZVZ7QgSScUfBBLpQWsbp8R+OnXXeEPhaBrnQz6Stx X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jun 2026 05:50:49.9692 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b0279f84-c79a-48cd-4c0a-08ded66b8a1c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0001708E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH8PR12MB9814 On 6/26/2026 4:59 PM, sashiko-bot@kernel.org wrote: > [You don't often get email from sashiko-bot@kernel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ] > > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: > - [Medium] `amd_iommu_update_ga` dynamically modifies the `gappi_dis` field in the IRTE without issuing an IOMMU invalidation, which may result in permanently lost wakeups. > -- > > commit f265b23208b1df21d27bc13bee3b5f94ce45d71c > Author: Sairaj Kodilkar > > iommu/amd: Configure IRTE to use the GAPPI for posted interrupts > > This commit updates the AMD IOMMU driver to support Guest APIC Posted > Interrupts (GAPPI). It configures the Interrupt Remapping Table Entry (IRTE) > for wakeups using the reserved POSTED_INTR_WAKEUP_VECTOR when the guest > is not running. > >> diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c >> --- a/drivers/iommu/amd/iommu.c >> +++ b/drivers/iommu/amd/iommu.c > [ ... ] >> @@ -3969,9 +3969,18 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid, int flags) >> entry->lo.fields_vapic.is_run = true; >> entry->lo.fields_vapic.ga_log_intr = false; >> } else { >> - entry->lo.fields_vapic.is_run = false; >> - entry->lo.fields_vapic.ga_log_intr = !!(flags & >> - AMD_IOMMU_FLAG_POSTED_INTR); >> + bool posted_intr = !!(flags & AMD_IOMMU_FLAG_POSTED_INTR); >> + if (amd_iommu_gappi) { >> + entry->lo.fields_vapic.gappi_dis = !posted_intr && >> + check_feature2(FEATURE_GAPPIDISSUP); > [Severity: Medium] > Does this code need to issue an IOMMU cache invalidation after modifying > gappi_dis? > > Since __amd_iommu_update_ga() is a fast-path update function, it appears > there is no subsequent IOMMU cache flush when gappi_dis changes. If KVM > schedules out a vCPU (setting gappi_dis = 1) and then the vCPU blocks > (setting gappi_dis = 0), hardware that caches the gappi_dis bit might not > observe the transition back to 0. > > Could this caching behavior lead to permanently dropped wakeup interrupts > and indefinite vCPU hangs? The gappi_dis bit is not cached. See the IOMMU spec [1] section 2.2.5.2 Interrupt Virtualization Tables with Guest Virtual APIC Enabled " When virtual interrupts are enabled by setting MMIO Offset 0018h[GAEn] and IRTE[GuestMode=1], the fields IRTE[IsRun], IRTE[Destination], IRTE[GALogIntr], IRTE[GAPPIDis], and, if present, IRTE[GATag] are not cached by the IOMMU. Modifications to these fields do not require an invalidation of the Interrupt Remapping Table. " Hence we do not need to flush the IRTE after modifying gappi_dis bit. [1] https://docs.amd.com/v/u/en-US/48882_3.11_IOMMU_PUB Thanks Sairaj >> + entry->lo.fields_vapic.is_run = false; >> + entry->lo.fields_vapic.destination = >> + APICID_TO_IRTE_DEST_LO(apicid); >> + entry->hi.fields.destination = APICID_TO_IRTE_DEST_HI(apicid); > -- > Sashiko AI review ยท https://sashiko.dev/#/patchset/20260626105906.14577-1-sarunkod@amd.com?part=2