diff for duplicates of <ff5fdfb8c08179235c54f9ef8aa4cf68@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index 1385bda..2436cd6 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -39,18 +39,18 @@ On 2018-03-16 15:08, Sricharan R wrote: > + #size-cells = <1>; > + ranges; > + -> + rsvd1@87000000 { +> + rsvd1 at 87000000 { > + /* Reserved for other subsystem */ > + reg = <0x87000000 0x500000>; > + no-map; > + }; > + -> + wifi_dump@87500000 { +> + wifi_dump at 87500000 { > + reg = <0x87500000 0x600000>; > + no-map; > + }; > + -> + rsvd2@87B00000 { +> + rsvd2 at 87B00000 { > + /* Reserved for other subsystem */ > + reg = <0x87B00000 0x500000>; > + no-map; @@ -58,7 +58,7 @@ On 2018-03-16 15:08, Sricharan R wrote: > + }; > + > + soc { -> + pinctrl@1000000 { +> + pinctrl at 1000000 { > + serial_0_pins: serial0_pinmux { > + mux { > + pins = "gpio16", "gpio17"; @@ -110,29 +110,29 @@ On 2018-03-16 15:08, Sricharan R wrote: > + }; > + }; > + -> + serial@78af000 { +> + serial at 78af000 { > + pinctrl-0 = <&serial_0_pins>; > + pinctrl-names = "default"; > + status = "ok"; > + }; > + -> + serial@78b0000 { +> + serial at 78b0000 { > + pinctrl-0 = <&serial_1_pins>; > + pinctrl-names = "default"; > + status = "ok"; > + }; > + -> + blsp_dma: dma@7884000 { +> + blsp_dma: dma at 7884000 { > + status = "ok"; > + }; > + -> + spi_0: spi@78b5000 { /* BLSP1 QUP1 */ +> + spi_0: spi at 78b5000 { /* BLSP1 QUP1 */ > + pinctrl-0 = <&spi_0_pins>; > + pinctrl-names = "default"; > + status = "ok"; > + cs-gpios = <&tlmm 12 0>; > + -> + m25p80@0 { +> + m25p80 at 0 { > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0>; @@ -141,7 +141,7 @@ On 2018-03-16 15:08, Sricharan R wrote: > + }; > + }; > + -> + pcie0: pci@40000000 { +> + pcie0: pci at 40000000 { > + status = "ok"; > + perst-gpio = <&tlmm 38 0x1>; > + }; diff --git a/a/content_digest b/N1/content_digest index adad023..0db8dc7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,24 +1,9 @@ "ref\01521193101-4586-1-git-send-email-sricharan@codeaurora.org\0" "ref\01521193101-4586-6-git-send-email-sricharan@codeaurora.org\0" - "From\0Abhishek Sahu <absahu@codeaurora.org>\0" - "Subject\0Re: [PATCH v2 05/13] ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi\0" + "From\0absahu@codeaurora.org (Abhishek Sahu)\0" + "Subject\0[PATCH v2 05/13] ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi\0" "Date\0Fri, 16 Mar 2018 15:51:15 +0530\0" - "To\0Sricharan R <sricharan@codeaurora.org>\0" - "Cc\0robh+dt@kernel.org" - robh@kernel.org - mark.rutland@arm.com - linux@armlinux.org.uk - andy.gross@linaro.org - david.brown@linaro.org - catalin.marinas@arm.com - will.deacon@arm.com - sboyd@codeaurora.org - bjorn.andersson@linaro.org - devicetree@vger.kernel.org - linux-kernel@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-arm-msm@vger.kernel.org - " linux-soc@vger.kernel.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 2018-03-16 15:08, Sricharan R wrote:\n" @@ -62,18 +47,18 @@ "> +\t\t#size-cells = <1>;\n" "> +\t\tranges;\n" "> +\n" - "> +\t\trsvd1@87000000 {\n" + "> +\t\trsvd1 at 87000000 {\n" "> +\t\t\t/* Reserved for other subsystem */\n" "> +\t\t\treg = <0x87000000 0x500000>;\n" "> +\t\t\tno-map;\n" "> +\t\t};\n" "> +\n" - "> +\t\twifi_dump@87500000 {\n" + "> +\t\twifi_dump at 87500000 {\n" "> +\t\t\treg = <0x87500000 0x600000>;\n" "> +\t\t\tno-map;\n" "> +\t\t};\n" "> +\n" - "> +\t\trsvd2@87B00000 {\n" + "> +\t\trsvd2 at 87B00000 {\n" "> +\t\t\t/* Reserved for other subsystem */\n" "> +\t\t\treg = <0x87B00000 0x500000>;\n" "> +\t\t\tno-map;\n" @@ -81,7 +66,7 @@ "> +\t};\n" "> +\n" "> +\tsoc {\n" - "> +\t\tpinctrl@1000000 {\n" + "> +\t\tpinctrl at 1000000 {\n" "> +\t\t\tserial_0_pins: serial0_pinmux {\n" "> +\t\t\t\tmux {\n" "> +\t\t\t\t\tpins = \"gpio16\", \"gpio17\";\n" @@ -133,29 +118,29 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tserial@78af000 {\n" + "> +\t\tserial at 78af000 {\n" "> +\t\t\tpinctrl-0 = <&serial_0_pins>;\n" "> +\t\t\tpinctrl-names = \"default\";\n" "> +\t\t\tstatus = \"ok\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tserial@78b0000 {\n" + "> +\t\tserial at 78b0000 {\n" "> +\t\t\tpinctrl-0 = <&serial_1_pins>;\n" "> +\t\t\tpinctrl-names = \"default\";\n" "> +\t\t\tstatus = \"ok\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tblsp_dma: dma@7884000 {\n" + "> +\t\tblsp_dma: dma at 7884000 {\n" "> +\t\t\tstatus = \"ok\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tspi_0: spi@78b5000 { /* BLSP1 QUP1 */\n" + "> +\t\tspi_0: spi at 78b5000 { /* BLSP1 QUP1 */\n" "> +\t\t\tpinctrl-0 = <&spi_0_pins>;\n" "> +\t\t\tpinctrl-names = \"default\";\n" "> +\t\t\tstatus = \"ok\";\n" "> +\t\t\tcs-gpios = <&tlmm 12 0>;\n" "> +\n" - "> +\t\t\tm25p80@0 {\n" + "> +\t\t\tm25p80 at 0 {\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <1>;\n" "> +\t\t\t\treg = <0>;\n" @@ -164,11 +149,11 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tpcie0: pci@40000000 {\n" + "> +\t\tpcie0: pci at 40000000 {\n" "> +\t\t\tstatus = \"ok\";\n" "> +\t\t\tperst-gpio = <&tlmm 38 0x1>;\n" "> +\t\t};\n" "> +\t};\n" > +}; -9b0600b54b908051557b5996b18826b6fb141f98eb54bb8ab93aac91c1645c15 +8a9024372d41f461452fb23a54abcf0dc342097ef19e12b9cc954babbf96f476
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