From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1081CF6D42 for ; Wed, 2 Oct 2024 17:01:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=whCOOr1Pe7ZSlPLDev3fooyZu0FVn/sbUhoulx/8waI=; b=Ue2FWlz9xfkP9+J902l7XIOiQR zDWbKbUwE1iq4lNr1U8AIhIlM4z2RgIwe74+kf0XPsL6LXsiE96qJNVQ+8gBOfPLmbC2nxBR9oR0t pLZ9cCMF2LKfM3jCuuBMSDHb5sS5UhBk0QIHkfksJz9HI5M10M61jnQDpf4Hr0txYmUGU+tL/q32E c7lU6cPteK0na48NPEQcKt+aTcyKIuYnWTTFzXuOIQaXbOru1mPpuUqUDVqvD05cNyRxJnMiaSbDg AMdBRRNP1vut2J/Z8TeWm5PvsVaYRlbk0+Hmz0u9vXE1ec9QJTEauMe4pwrIeBfB/PVmsfKdXHzLM /nGMuu0A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sw2ib-0000000700T-1nd9; Wed, 02 Oct 2024 17:00:53 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sw2g7-00000006zOF-3PCJ for linux-arm-kernel@lists.infradead.org; Wed, 02 Oct 2024 16:58:21 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A8C3B339; Wed, 2 Oct 2024 09:58:48 -0700 (PDT) Received: from [10.1.196.28] (eglon.cambridge.arm.com [10.1.196.28]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 006D43F64C; Wed, 2 Oct 2024 09:58:17 -0700 (PDT) Message-ID: Date: Wed, 2 Oct 2024 17:58:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] iommu/arm-smmu-v3: Fix L1 stream table index calculation for AmpereOne Content-Language: en-GB To: Yang Shi , Jason Gunthorpe Cc: Nicolin Chen , will@kernel.org, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20241001180346.1485194-1-yang@os.amperecomputing.com> <45b97496-29a2-4111-ba38-3c8bcf9f8b4d@os.amperecomputing.com> <20241001191800.GA1369530@ziepe.ca> <0e84f3c0-09d6-4485-ac76-ca296d1ee07e@os.amperecomputing.com> <20241001194620.GB1369530@ziepe.ca> From: James Morse In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241002_095819_957767_589E315A X-CRM114-Status: GOOD ( 18.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello, On 01/10/2024 21:47, Yang Shi wrote: > On 10/1/24 12:46 PM, Jason Gunthorpe wrote: >> On Tue, Oct 01, 2024 at 12:38:56PM -0700, Yang Shi wrote: >>> >>> On 10/1/24 12:18 PM, Jason Gunthorpe wrote: >>>> On Tue, Oct 01, 2024 at 12:09:03PM -0700, Yang Shi wrote: >>>>>> Also, there are other places doing "1 << smmu->sid_bits", e.g. >>>>>> arm_smmu_init_strtab_linear(). >>>>> The disassembly shows it uses "sbfiz x21, x20, 6, 32" instead of lsl. 1UL >>>>> should be used if we want to take extra caution and don't prefer rely on >>>>> compiler. >>>> Still, we should be fixing them all if sid_bits == 32, all those >>>> shifts should be throwing a UBSAN error. It would be crazy to have a >>> OK, will cover this is v2. >> Maybe just make a little inline function to do this math and remove >> the repated open coding? Then the types can be right, etc. > > Something like this? > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 01a2faee04bc..0f3aa7962117 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -3624,8 +3624,9 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu) >  { >         u32 l1size; >         struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; > +       unsigned int max_sid = arm_smmu_strtab_max_sid(smmu->sid_bits); >         unsigned int last_sid_idx = > -               arm_smmu_strtab_l1_idx((1UL << smmu->sid_bits) - 1); > +               arm_smmu_strtab_l1_idx(max_sid - 1); > >         /* Calculate the L1 size, capped to the SIDSIZE. */ >         cfg->l2.num_l1_ents = min(last_sid_idx + 1, STRTAB_MAX_L1_ENTRIES); > @@ -3657,8 +3658,9 @@ static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu) >  { >         u32 size; >         struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; > +       unsigned int max_sid = arm_smmu_strtab_max_sid(smmu->sid_bits); > > -       size = (1 << smmu->sid_bits) * sizeof(struct arm_smmu_ste); > +       size = max_sid * sizeof(struct arm_smmu_ste); >         cfg->linear.table = dmam_alloc_coherent(smmu->dev, size, > &cfg->linear.ste_dma, >                                                 GFP_KERNEL); > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > index 1e9952ca989f..de9f14293485 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > @@ -235,6 +235,11 @@ static inline u32 arm_smmu_strtab_l2_idx(u32 sid) >         return sid % STRTAB_NUM_L2_STES; >  } > > +static inline unsigned int arm_smmu_strtab_max_sid(unsigned int sid_bits) > +{ > +       return (1UL << sid_bits); > +} > + On the same platform - this also fixes the issue: Tested-by: James Morse Thanks, James