From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from plane.gmane.org ([80.91.229.3]:58330 "EHLO plane.gmane.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754678Ab2HaTaF (ORCPT ); Fri, 31 Aug 2012 15:30:05 -0400 Received: from list by plane.gmane.org with local (Exim 4.69) (envelope-from ) id 1T7Wuq-0008S2-1Q for linux-pci@vger.kernel.org; Fri, 31 Aug 2012 21:30:04 +0200 Received: from 99-119-199-15.lightspeed.sntcca.sbcglobal.net ([99.119.199.15]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Fri, 31 Aug 2012 21:30:04 +0200 Received: from paolopiace by 99-119-199-15.lightspeed.sntcca.sbcglobal.net with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Fri, 31 Aug 2012 21:30:04 +0200 To: linux-pci@vger.kernel.org From: Paolo Subject: BAR0/1 & enumeration Date: Fri, 31 Aug 2012 19:29:50 +0000 (UTC) Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Sender: linux-pci-owner@vger.kernel.org List-ID: As newbie to the pcie world, I'm seeking help for understanding this: How does the bios during enumeration finds whether BAR0/1 is set for pointing to the config-space of its function or to memory space for memory transactions? Thanks!