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From: Andi Kleen <ak@muc.de>
To: Subrahmanyam Ongole <songole@gmail.com>
Cc: linux-kernel@vger.kernel.org
Subject: Re: x86-64: Kernel with large page size
Date: Sat, 11 Jun 2005 11:58:39 +0200	[thread overview]
Message-ID: <m164wldxkg.fsf@muc.de> (raw)
In-Reply-To: <a8447f24050603175061598809@mail.gmail.com> (Subrahmanyam Ongole's message of "Fri, 3 Jun 2005 17:50:55 -0700")

Subrahmanyam Ongole <songole@gmail.com> writes:

> When we run our application on AMD Opteron processors, we are seeing a
> large number of   L1_AND_L2_DTLB_MISSES. We used oprofile to measure
> these numbers.
>
> We wanted to try with a bigger page size and see if we could bring it
> down. TLB caches 4k page translations. I don't  know if larger page

You can use large pages in your application by mmaping
from a file in hugetlbfs and configuring large pages using sysctl.

> size would even help here.

It probably wouldn't because Opteron has much more 4K DTLB entries
than 2M DTLB entries. I have had people trying the opposite from
what you tried (using 4K pages for the kernel instead of 2MB),
but that also doesn't work right now.

-Andi


      parent reply	other threads:[~2005-06-11  9:58 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-06-04  0:50 x86-64: Kernel with large page size Subrahmanyam Ongole
2005-06-04  0:59 ` William Lee Irwin III
2005-06-04  2:28   ` Nick Piggin
2005-06-11  9:58 ` Andi Kleen [this message]

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