From: Andi Kleen <andi@firstfloor.org>
To: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
Cc: Burt Triplett <burt@pbjtriplett.org>, linux-kernel@vger.kernel.org
Subject: Re: BITS handling of CPU microcode updates
Date: Thu, 24 Mar 2011 14:46:21 -0700 [thread overview]
Message-ID: <m2ipv8kx8y.fsf@firstfloor.org> (raw)
In-Reply-To: <20110324001451.GA7950@khazad-dum.debian.net> (Henrique de Moraes Holschuh's message of "Wed, 23 Mar 2011 21:14:51 -0300")
Henrique de Moraes Holschuh <hmh@hmh.eng.br> writes:
>
> Very well, I will send patches to fix that behaviour, as well as some
> other stuff I noticed that was not updated to match the recommended
> actions documented by the SDM and some Intel application notes.
I don't think you can easily -- there's no kernel interface
to distingush the "explicit user action" case from automatic loading.
This all would need a new kernel interface.
I suppose all the test labs have learned by now how to disable
automatic updates ...
-Andi
--
ak@linux.intel.com -- Speaking for myself only
next prev parent reply other threads:[~2011-03-24 21:47 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-24 5:36 [announce] Intel BIOS Implementation Test Suite (BITS) Burt Triplett
2011-03-12 2:30 ` BITS handling of CPU microcode updates Henrique de Moraes Holschuh
2011-03-21 23:44 ` Burt Triplett
2011-03-24 0:14 ` Henrique de Moraes Holschuh
2011-03-24 20:53 ` Burt Triplett
2011-03-25 0:57 ` Henrique de Moraes Holschuh
2011-03-24 21:46 ` Andi Kleen [this message]
2011-03-25 7:05 ` Burt Triplett
2011-03-25 2:09 ` x86/microcode: intel: correctly handle negative revisions Henrique de Moraes Holschuh
2011-03-25 7:14 ` Burt Triplett
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