From mboxrd@z Thu Jan 1 00:00:00 1970 From: khalasa@piap.pl (Krzysztof =?utf-8?Q?Ha=C5=82asa?=) Date: Fri, 29 Jan 2016 17:18:09 +0100 Subject: [PATCH 3/7] usb: gadget: pxa25x_udc: use readl/writel for mmio In-Reply-To: <1453997843-3489728-3-git-send-email-arnd@arndb.de> (Arnd Bergmann's message of "Thu, 28 Jan 2016 17:17:04 +0100") References: <1453997722-3489596-1-git-send-email-arnd@arndb.de> <1453997843-3489728-1-git-send-email-arnd@arndb.de> <1453997843-3489728-3-git-send-email-arnd@arndb.de> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Arnd Bergmann writes: > The unclear part here is for IXP4xx, which supports both big-endian > and little-endian configurations. So far, the driver has done > no byteswap in either case. I suspect that is wrong and it would > actually need to swap in one or the other case, but I don't know > which. If at all, I guess it should swap in LE mode. But it's far from certain. > It's also possible that there is some magic setting in > the chip that makes the endianess of the MMIO register match the > CPU, and in that case, the code actually does the right thing > for all configurations, both before and after this patch. This is IMHO most probable. Actually, the IXP4xx is "natural" in BE mode (except for PCI) and normally in LE mode it's order-coherent, meaning 32-bit "integer" accesses need no swapping, but 8-bit and (mostly unused) 16-bit transfers need swapping. Anyway, I think readl()/writel() do the right thing: in BE mode they swap PCI accesses and don't swap normal registers, in LE mode nothing is swapped. LE data-coherent mode (which has never landed in the official kernel) is a bit different, but still, readl()/writel() do the right thing. I remember the "string" (block) functions preserve 8-bit ordering, and thus 32-bit values transfered using them may need swapping. -- Krzysztof Halasa Industrial Research Institute for Automation and Measurements PIAP Al. Jerozolimskie 202, 02-486 Warsaw, Poland From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932391AbcA2QSN (ORCPT ); Fri, 29 Jan 2016 11:18:13 -0500 Received: from ni.piap.pl ([195.187.100.4]:44100 "EHLO ni.piap.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750991AbcA2QSL (ORCPT ); Fri, 29 Jan 2016 11:18:11 -0500 From: khalasa@piap.pl (Krzysztof =?utf-8?Q?Ha=C5=82asa?=) To: Arnd Bergmann Cc: Felipe Balbi , linux-arm-kernel@lists.infradead.org, Felipe Balbi , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Robert Jarzmik , Haojian Zhuang , Daniel Mack , Imre Kaloz , Greg Kroah-Hartman Subject: Re: [PATCH 3/7] usb: gadget: pxa25x_udc: use readl/writel for mmio References: <1453997722-3489596-1-git-send-email-arnd@arndb.de> <1453997843-3489728-1-git-send-email-arnd@arndb.de> <1453997843-3489728-3-git-send-email-arnd@arndb.de> Date: Fri, 29 Jan 2016 17:18:09 +0100 In-Reply-To: <1453997843-3489728-3-git-send-email-arnd@arndb.de> (Arnd Bergmann's message of "Thu, 28 Jan 2016 17:17:04 +0100") Message-ID: MIME-Version: 1.0 Content-Type: text/plain X-KLMS-Rule-ID: 1 X-KLMS-Message-Action: clean X-KLMS-AntiSpam-Lua-Profiles: 90412 [Jan 29 2016] X-KLMS-AntiSpam-Version: 5.5.6 X-KLMS-AntiSpam-Envelope-From: khalasa@piap.pl X-KLMS-AntiSpam-Rate: 0 X-KLMS-AntiSpam-Status: not_detected X-KLMS-AntiSpam-Method: none X-KLMS-AntiSpam-Moebius-Timestamps: 3937959, 3937987, 3937970 X-KLMS-AntiSpam-Info: LuaCore: 407 407 95088b6730bc8abe9b35391686e3291f9b43d2f2, Auth:dkim=none X-KLMS-AntiSpam-Interceptor-Info: scan successful X-KLMS-AntiPhishing: Clean, 2016/01/26 12:51:30 X-KLMS-AntiVirus: Kaspersky Security 8.0 for Linux Mail Server, version 8.0.1.721, bases: 2016/01/29 00:58:00 #6881148 X-KLMS-AntiVirus-Status: Clean, skipped Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Arnd Bergmann writes: > The unclear part here is for IXP4xx, which supports both big-endian > and little-endian configurations. So far, the driver has done > no byteswap in either case. I suspect that is wrong and it would > actually need to swap in one or the other case, but I don't know > which. If at all, I guess it should swap in LE mode. But it's far from certain. > It's also possible that there is some magic setting in > the chip that makes the endianess of the MMIO register match the > CPU, and in that case, the code actually does the right thing > for all configurations, both before and after this patch. This is IMHO most probable. Actually, the IXP4xx is "natural" in BE mode (except for PCI) and normally in LE mode it's order-coherent, meaning 32-bit "integer" accesses need no swapping, but 8-bit and (mostly unused) 16-bit transfers need swapping. Anyway, I think readl()/writel() do the right thing: in BE mode they swap PCI accesses and don't swap normal registers, in LE mode nothing is swapped. LE data-coherent mode (which has never landed in the official kernel) is a bit different, but still, readl()/writel() do the right thing. I remember the "string" (block) functions preserve 8-bit ordering, and thus 32-bit values transfered using them may need swapping. -- Krzysztof Halasa Industrial Research Institute for Automation and Measurements PIAP Al. Jerozolimskie 202, 02-486 Warsaw, Poland