All of lore.kernel.org
 help / color / mirror / Atom feed
From: Vincent Bernat <vincent@bernat.im>
To: Eduardo Habkost <ehabkost@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <rth@twiddle.net>,
	qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge
Date: Mon, 08 Jan 2018 22:51:48 +0100	[thread overview]
Message-ID: <m3d12k9fyj.fsf@luffy.cx> (raw)
In-Reply-To: <20180108211623.GJ6646@localhost.localdomain> (Eduardo Habkost's message of "Mon, 8 Jan 2018 19:16:23 -0200")

 ❦  8 janvier 2018 19:16 -0200, Eduardo Habkost <ehabkost@redhat.com> :

> One possible way to work around this problem is to declare that
> QEMU 2.12 with KVM will require Linux v3.6 and newer (because we
> need Linux kernel commit ad756a1603c5 "KVM: VMX: Implement
> PCID/INVPCID for guests with EPT").  I have proposed something
> similar to allow us to enable kvm_pv_eoi by default, some time
> ago:
> https://www.mail-archive.com/qemu-devel@nongnu.org/msg486559.html
> ("qemu-doc: Document minimum kernel version for KVM in x86_64").

I don't see a way to probe KVM to know what's supported, so yes. Should
I add a paragraph similar to yours or would your patch be merged soon?
What are the consequences of running a too old kernel? Would KVM just
hide PCID flag?

> Second, we need compatibility entries setting pcid=off on
> PC_COMPAT_2_10 so we don't break compatibility on older
> machine-types.

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 6f77eb066587..da5bd8304eb0 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -327,6 +327,14 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
         .driver   = TYPE_X86_CPU,\
         .property = "x-hv-max-vps",\
         .value    = "0x40",\
+    },{\
+        .driver   = "SandyBridge-" TYPE_X86_CPU,\
+        .property = "pcid",\
+        .value    = "off",\
+    },{\
+        .driver   = "IvyBridge-" TYPE_X86_CPU,\
+        .property = "pcid",\
+        .value    = "off",\
     },{\
         .driver   = "i440FX-pcihost",\
         .property = "x-pci-hole64-fix",\

I'll resend a proper patch once the first point is cleared.
-- 
Make sure input cannot violate the limits of the program.
            - The Elements of Programming Style (Kernighan & Plauger)

  reply	other threads:[~2018-01-08 21:51 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-08 20:50 [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge Vincent Bernat
2018-01-08 21:16 ` Eduardo Habkost
2018-01-08 21:51   ` Vincent Bernat [this message]
2018-01-08 22:14     ` Eduardo Habkost
2018-01-08 22:22       ` Vincent Bernat
2018-01-08 22:28         ` Eduardo Habkost
2018-01-08 22:37   ` Paolo Bonzini
2018-01-08 22:56     ` Eduardo Habkost
2018-01-08 23:09       ` Paolo Bonzini
2018-01-08 23:19         ` Eduardo Habkost
2018-01-09  7:04           ` Vincent Bernat
2018-01-09  6:41       ` Vincent Bernat
2018-01-09  6:40     ` Vincent Bernat

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=m3d12k9fyj.fsf@luffy.cx \
    --to=vincent@bernat.im \
    --cc=ehabkost@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=rth@twiddle.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.