From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Ball Subject: Re: [PATCH v4 08/15] mmc: sd: add support for tuning during uhs initialization Date: Tue, 10 May 2011 23:38:16 -0400 Message-ID: References: <1304578151-1775-1-git-send-email-arindam.nath@amd.com> <1304578151-1775-9-git-send-email-arindam.nath@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from void.printf.net ([89.145.121.20]:43576 "EHLO void.printf.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754184Ab1EKDfs (ORCPT ); Tue, 10 May 2011 23:35:48 -0400 In-Reply-To: <1304578151-1775-9-git-send-email-arindam.nath@amd.com> (Arindam Nath's message of "Thu, 5 May 2011 12:19:04 +0530") Sender: linux-mmc-owner@vger.kernel.org List-Id: linux-mmc@vger.kernel.org To: Arindam Nath Cc: prakity@marvell.com, zhangfei.gao@gmail.com, subhashj@codeaurora.org, linux-mmc@vger.kernel.org, henry.su@amd.com, aaron.lu@amd.com, anath.amd@gmail.com Hi, On Thu, May 05 2011, Arindam Nath wrote: > Host Controller needs tuning during initialization to operate SDR50 > and SDR104 UHS-I cards. Whether SDR50 mode actually needs tuning is > indicated by bit 45 of the Host Controller Capabilities register. > A new command CMD19 has been defined in the Physical Layer spec > v3.01 to request the card to send tuning pattern. > > We enable Buffer Read Ready interrupt at the very begining of tuning > procedure, because that is the only interrupt generated by the Host > Controller during tuning. We program the block size to 64 in the > Block Size register. We make sure that DMA Enable and Multi Block > Select in the Transfer Mode register are set to 0 before actually > sending CMD19. The tuning block is sent by the card to the Host > Controller using DAT lines, so we set Data Present Select (bit 5) in > the Command register. The Host Controller is responsible for doing > the verfication of tuning block sent by the card at the hardware > level. After sending CMD19, we wait for Buffer Read Ready interrupt. > In case we don't receive an interrupt after the specified timeout > value, we fall back on fixed sampling clock by setting Execute > Tuning (bit 6) and Sampling Clock Select (bit 7) of Host Control2 > register to 0. Before exiting the tuning procedure, we disable Buffer > Read Ready interrupt and re-enable other interrupts. > > Signed-off-by: Arindam Nath > Acked-by: Philip Rakity > Tested-by: Philip Rakity Thanks, pushed to mmc-next for .40 with the trivial changes below: (There's no need to memset cmd.resp separately, right?) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 91173cd..39cceee 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1557,24 +1557,19 @@ static int sdhci_execute_tuning(struct mmc_host *mmc) */ timeout = 150; do { - struct mmc_command cmd; - struct mmc_request mrq; + struct mmc_command cmd = {0}; + struct mmc_request mrq = {0}; if (!tuning_loop_counter && !timeout) break; - memset(&cmd, 0, sizeof(struct mmc_command)); cmd.opcode = MMC_SEND_TUNING_BLOCK; cmd.arg = 0; cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; - - memset(&cmd.resp, 0, sizeof(cmd.resp)); cmd.retries = 0; - cmd.data = NULL; cmd.error = 0; - memset(&mrq, 0, sizeof(struct mmc_request)); mrq.cmd = &cmd; host->mrq = &mrq; @@ -1880,8 +1875,8 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) /* CMD19 generates _only_ Buffer Read Ready interrupt */ if (intmask & SDHCI_INT_DATA_AVAIL) { - if (SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)) - == MMC_SEND_TUNING_BLOCK) { + if (SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)) == + MMC_SEND_TUNING_BLOCK) { host->tuning_done = 1; wake_up(&host->buf_ready_int); return; - Chris. -- Chris Ball One Laptop Per Child