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From: Pratyush Yadav <pratyush@kernel.org>
To: Tudor Ambarus <tudor.ambarus@linaro.org>
Cc: Jaime Liao <jaimeliao.tw@gmail.com>,
	 linux-mtd@lists.infradead.org, pratyush@kernel.org,
	 michael@walle.cc,  miquel.raynal@bootlin.com, leoyu@mxic.com.tw,
	 jaimeliao@mxic.com.tw
Subject: Re: [PATCH v4 1/6] mtd: spi-nor: Add manufacturer read id function
Date: Thu, 05 Oct 2023 13:02:07 +0200	[thread overview]
Message-ID: <mafs034yppc28.fsf@kernel.org> (raw)
In-Reply-To: <b998ea18-8ce9-83b0-f42f-18e5ea08175b@linaro.org> (Tudor Ambarus's message of "Wed, 20 Sep 2023 15:28:58 +0300")

On Wed, Sep 20 2023, Tudor Ambarus wrote:

> Hi, Jaime,
>
> Thanks for the patch! I think we are getting closer to have this
> integrated, but I have some concerns that hopefully with your help we'll
> address and move forward.
>
> On 08.09.2023 09:42, Jaime Liao wrote:
>> From: JaimeLiao <jaimeliao@mxic.com.tw>
>> 
>> Add manufacturer read id function because of some flash
>> may change data format when read id in octal dtr mode.
>
> I'm not convinced such a method is really needed, would you please
> elaborate the explanation why it's needed?
>
> I'm looking at the mx66lm1g45g datasheet. From what I see in "Figure 13.
> Read Identification (RDID) Sequence (DTR-OPI Mode)" looks like even if
> the flash is operated in 8d-8d-8d mode, what the flash actually uses is
> a 8d-8d-8s mode for the read id. Each ID byte is sent twice on both
> rising and falling edge of the clock, thus behaving like a 8d-8d-8s
> protocol.
>
> I see this flash supports 1-1-1, 8-8-8, and 8d-8d-8d, there are no mixed
> modes supported, thus a 8d-8d-8s mode seems just like a hardware bug to
> me. So my proposal is to leave the core away and to handle the read id
> hack just in the macronix driver.

+1

[...]
>> diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
>> index eb149e517c1f..8ab47691dfbb 100644
>> --- a/drivers/mtd/spi-nor/macronix.c
>> +++ b/drivers/mtd/spi-nor/macronix.c
>> @@ -118,9 +118,27 @@ static int macronix_nor_late_init(struct spi_nor *nor)
>>  	return 0;
>>  }
>>  
>> +static int macronix_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id,
>> +				enum spi_nor_protocol proto)
>> +{
>> +	int i, ret;
>> +
>> +	ret = spi_nor_default_read_id(nor, naddr, ndummy, id, proto);
>> +	/* Retrieve odd array and re-sort id because of read id format will be A-A-B-B-C-C
>> +	 * after enter into octal dtr mode for Macronix flashes.
>> +	 */
>> +	if (proto == SNOR_PROTO_8_8_8_DTR) {
>> +		for (i = 0; i < nor->info->id_len; i++)
>> +			id[i] = id[i*2];
>
> why do you overwrite the id? How about just checking that
> id[i] == id[i + 1]? why do you care if you print an a-a-b-b-c-c id?

Because id_len == 3 so you should only treat the ID as a-a-b. When you
memcmp() the ID after reading it, you would not get a match.

>> +	}
>> +
>> +	return ret;
>> +}
>> +
>>  static const struct spi_nor_fixups macronix_nor_fixups = {
>>  	.default_init = macronix_nor_default_init,
>>  	.late_init = macronix_nor_late_init,
>> +	.read_id = macronix_nor_read_id,
>>  };
>>  
>>  const struct spi_nor_manufacturer spi_nor_macronix = {

-- 
Regards,
Pratyush Yadav

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  reply	other threads:[~2023-10-05 11:02 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-08  6:42 [PATCH v4 0/6] Add octal DTR support for Macronix flash Jaime Liao
2023-09-08  6:42 ` [PATCH v4 1/6] mtd: spi-nor: Add manufacturer read id function Jaime Liao
2023-09-20 12:28   ` Tudor Ambarus
2023-10-05 11:02     ` Pratyush Yadav [this message]
2023-10-05 11:43       ` Michael Walle
     [not found]         ` <54e5662f-baf4-4660-9fc4-7959d2405120@linaro.org>
     [not found]           ` <29bb3d952b9f49961da5e01cf86f9c4f@walle.cc>
2023-10-05 14:11             ` Tudor Ambarus
2023-10-06  8:22               ` Michael Walle
2023-10-12  8:59                 ` liao jaime
2023-10-12  9:09                   ` Michael Walle
2023-10-12  9:50                     ` liao jaime
2023-10-13  8:06                       ` Michael Walle
2023-10-13  8:23                         ` liao jaime
2023-10-13  9:04                           ` Michael Walle
2023-10-13  9:14                             ` liao jaime
2023-10-13  9:32                               ` Michael Walle
2023-10-17 10:12                             ` Pratyush Yadav
2023-09-08  6:43 ` [PATCH v4 2/6] mtd: spi-nor: add Octal DTR support for Macronix flash Jaime Liao
2023-09-20 12:37   ` Tudor Ambarus
2023-10-05 10:18     ` Pratyush Yadav
2023-09-08  6:43 ` [PATCH v4 3/6] mtd: spi-nor: add support for Macronix Octal flash Jaime Liao
2023-09-20 12:41   ` Tudor Ambarus
2023-10-12  9:10     ` liao jaime
2023-09-08  6:43 ` [PATCH v4 4/6] spi: spi-mem: Allow specifying the byte order in DTR mode Jaime Liao
2023-09-20 12:47   ` Tudor Ambarus
2023-09-08  6:43 ` [PATCH v4 5/6] mtd: spi-nor: core: " Jaime Liao
2023-09-20 12:51   ` Tudor Ambarus
2023-09-08  6:43 ` [PATCH v4 6/6] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT Jaime Liao
2023-09-20 12:52   ` Tudor Ambarus

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