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charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org T24gV2VkLCBOb3YgMDUgMjAyNSwgTWlxdWVsIFJheW5hbCB3cm90ZToKCj4gSGVsbG8gU2FudGhv c2gsCj4KPj4+PiAgICAgLSBPbiB0dW5pbmcgZmFpbHVyZSwgcmV0cnkgYnkgcmUtcnVubmluZyBz cGlfbWVtX25lZWRzX3R1bmluZygpIHdpdGgKPj4+PiB0aGUgc2Vjb25kIGJlc3Qgc2V0IG9mIG9w cyAobWF4IHRocm91Z2hwdXQgLSAxKQo+Pj4gSSB3b3VsZCBsaWtlIHRvIGNoYWxsZW5nZSB0aGlz IG5lZWQuIENhbiB0aGUgc2FtZSBjYWxpYnJhdGlvbiBmYWlsIGlmCj4+PiBhdHRlbXB0ZWQgbXVs dGlwbGUgdGltZXMgKGVnLiBiZWNhdXNlIG9mIHRoZSBoZWF0PykgSWYgeWVzLCB0aGVuIHdlIG5l ZWQKPj4+IGEgZmFsbGJhY2sgaW5kZWVkLiBPdGhlcndpc2UsIEknZCBiZSBpbiBmYXZvciBvZiBq dXN0IGZhaWxpbmcgdGhlCj4+PiBwcm9iZS4gQ2FsaWJyYXRpb24gaXMgYW4gb3B0LWluIC0+IHVz ZXJzIG11c3QgYWxsb3cgYSBoaWdoZXIgZnJlcXVlbmN5Cj4+PiB0aGFuIHRoZXkgdXNlIHRvIGlu IG9yZGVyIHRvIGVuYWJsZSB0aGUgZmVhdHVyZT8KPj4KPj4gSXQncyBwb3NzaWJsZSB0aGUgc2Ft ZSBjYWxpYnJhdGlvbiB3aWxsIGZhaWwgaW50ZXJtaXR0ZW50bHkgZm9yCj4+IGRpZmZlcmVudCBy ZWFzb25zICh0ZW1wZXJhdHVyZSBjaGFuZ2VzLCBhcyB5b3UgbWVudGlvbmVkKS4gSWYgdHVuaW5n Cj4+IGZhaWxzLCB0aGUgZHJpdmVyIHNob3VsZCBmYWxsYmFjayB0byB0aGUgbm9uLVBIWSBmcmVx dWVuY3kgc28gdGhlIGZsYXNoCj4+IGNvbnRpbnVlcyBvcGVyYXRpbmcgd2l0aCBzbG93ZXIgcmVh ZHMvd3JpdGVzIHJhdGhlciB0aGFuIGZhaWxpbmcgdGhlCj4+IHByb2JlIChhdmFpbGFiaWxpdHkg c2hvdWxkIGJlIHByaW9yaXRpemVkLCByaWdodD8pLgo+Cj4gQWdyZWVkLCBpZiB0aGUgdHVuaW5n IG1heSBmYWlsIHdlIG11c3QgZmFsbGJhY2sgaW4gdGhpcyBjYXNlLiBIb3dldmVyCj4gdGhlcmUg aXMgYW5vdGhlciBzaXR1YXRpb24gdGhhdCBtdXN0IGJlIGhhbmRsZWQgaW4gdGhpcyBjYXNlOiBv bmNlCj4gdHVuaW5nIGlzIGRvbmUgYW5kIHdlIHdhbnQgdG8gdXNlIFBIWS1vcHRpbWl6ZWQgcGF0 aHMsIHdlIG11c3QgZmFsbGJhY2sKPiB0byBtb3JlIGJhc2ljL3Nsb3dlciByZWFkcyBpZiBmb3Ig c29tZSBleHRlcm5hbCByZWFzb24sIHRoZXkgc3RhcnQKPiBmYWlsaW5nLCByaWdodD8KCkhvdyB3 b3VsZCB5b3UgZXZlbiBkZXRlY3QgdGhhdCB5b3VyIHR1bmluZyBpcyBvdXQtb2YtZGF0ZSBiZWNh dXNlIG9mCnRlbXBlcmF0dXJlIGNoYW5nZXM/IFlvdSB3b3VsZCBuZWVkIHNvbWUgc29ydCBvZiBv bi1mbGFzaCBFQ0MgdG8gZGV0ZWN0CnRoYXQuIEkgdGhpbmsgbWFueSBvZiB0aGUgZmxhc2hlcyB0 aGF0IHN1cHBvcnQgRERSIHJlYWRzIGF0IGhpZ2gKZnJlcXVlbmNpZXMgYWxzbyBoYXZlIEVDQywg YnV0IEFGQUlLIHRoZSBTUEkgTk9SIGNvcmUgZG9lcyBub3Qgc3VwcG9ydAppdC4KCkFueXdheSwg SSB0aGluayB3ZSBzaG91bGQgbGltaXQgdGhlIHNjb3BlIG9mIHRoZSBwcm9ibGVtLiBMZXQncyBm aXJzdApzdGFydCB3aXRoIHRoZSBleHBlY3RhdGlvbiB0aGF0IHRoZSB0dW5pbmcgc3VwcG9ydHMg dGhlIHdob2xlIG9wZXJhdGlvbgpyYW5nZSBvZiB0aGUgZGV2aWNlLiBUaGlzIHdhcyB0cnVlIGF0 IGxlYXN0IGZvciB0aGUgc3BpLWNhZGVuY2UtcXVhZHNwaQp0dW5pbmcgdGhhdCBJIHdvcmtlZCBv biB3aGVuIEkgd2FzIGF0IFRJLiBUaGUgdHVuaW5nIHBhcmFtZXRlcnMgaGFkCmVub3VnaCBtYXJn aW4gdG8gZW5zdXJlIGl0IHdvcmtlZCBmb3IgdGhlIGRldmljZSdzIHdob2xlIHRlbXBlcmF0dXJl CnJhbmdlLgoKSWYgdGhlcmUgaXMgYSB0dW5pbmcgYWxnb3JpdGhtIHRoYXQgY2FuJ3QgZG8gdGhh dCwgdGhlbiB3ZSBjYW4gZXh0ZW5kCnRoZSBjb3JlIHRvIGVpdGhlciBkbyBFQ0Mgb3IgcGVyaGFw cyBsZXQgdGVtcGVyYXR1cmUgc2Vuc29ycyBzaWduYWwgdGhlCm5lZWQgZm9yIHJlLWNhbGlicmF0 aW9uLgoKQnV0IGZvciBub3cgSSB0aGluayBpdCBpcyBlYXNpZXN0IHRvIGp1c3QgaWdub3JlIHRo ZSBwcm9ibGVtIGFuZCBmb2N1cwpvbiB0aGUgb3RoZXIgb25lcyBsaWtlIGhvdyB0byBnZXQgdGhl IGNhbGlicmF0aW9uIHBhdHRlcm4gYW5kIGhvdyB0byBkbwp0aGUgdHVuaW5nLgoKPgo+IFRoZSBv YnZpb3VzIGNob2ljZSBpbiB0aGlzIGNhc2Ugd291bGQgYmUgdG8gbGV0IHRoaXMgZXJyb3IgaGFu ZGxpbmcgdG8KPiB0aGUgY29udHJvbGxlciBkcml2ZXIuIFJlLXVzaW5nIHRoZSBzYW1lIG9wZXJh dGlvbiBhdCBhIGxvd2VyIHNwZWVkCj4gd291bGQgYmUgc3Vib3B0aW1hbCwgYmVjYXVzZSB0aGUg ZmFzdGVzdCBvcGVyYXRpb24gYXQgYSBoaWdoIHNwZWVkIG1pZ2h0Cj4gbm90IGJlIHRoZSBtb3N0 IGVmZmljaWVudCBhdCBzbG93ZXIgc3BlZWRzIGR1ZSB0byB0aGUgbnVtYmVyIG9mIGR1bW15Cj4g Y3ljbGVzIG5lZWRlZCwuIEJ1dCBJIGJlbGlldmUgdGhpcyBpcyBuZWdsaWdpYmxlIGJhc2VkIG9u IHRoZSBmYWN0IHRoYXQKPiB3ZSBhbHJlYWR5IGFyZSBpbiBkZWdyYWRlZCBtb2RlIGF0IHRoYXQg c3RhZ2UuCj4KPiBIb3dldmVyLCB0aGlzIG1heSBjb25mbGljdCB3aXRoOgo+IC0gcmVhZCByZXRy aWVzCj4gLSBjb250aW51b3VzIHJlYWRzICg/KQo+Cj4gU28gaW4gcHJhY3RpY2UgdGhlIGZhbGxi YWNrIG1pZ2h0IGJlIG5lZWRlZCBvbiB0aGUgU1BJIE5BTkQvTk9SIHNpZGUKPiAodGhpcyBjYW4g YmUgZnVydGhlciBkaXNjdXNzZWQpLgo+Cj4gQnV0IG9uY2Ugd2Ugc29sdmUgdGhpcywgY29tZXMg YSBzaW1pbGFyIHByb2JsZW0gb24gdGhlIHdyaXRlIHNpZGUuIEhvdwo+IGRvIHdlIGtub3cgaWYg YSB3cml0ZSB3aWxsIG9yIGRpZCBmYWlsIGJlY2F1c2Ugb2YgYSB0ZW1wZXJhdHVyZSBjaGFuZ2U/ Cj4gV2hhdCBtYXkgYmUgdGhlIGhldXJpc3RpY3MgdG8gZmFsbGJhY2sgaW4gdGhpcyBjYXNlPwoK U2FudGhvc2gsIGRvIHlvdSBoYXZlIGFueSBudW1iZXJzIG9uIHdyaXRlIHBlcmZvcm1hbmNlIGlt cHJvdmVtZW50cz8gSQphbSBjdXJpb3VzIGlmIGl0IGlzIGV2ZW4gd29ydGggdGhlIGVmZm9ydC4K Cj4KPiBUaGFua3MsCj4gTWlxdcOobAoKLS0gClJlZ2FyZHMsClByYXR5dXNoIFlhZGF2CgpfX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KTGludXgg TVREIGRpc2N1c3Npb24gbWFpbGluZyBsaXN0Cmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21h aWxtYW4vbGlzdGluZm8vbGludXgtbXRkLwo= From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0717635580A; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="naSJ79qd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C5A79C2BCB5; Tue, 18 Nov 2025 13:42:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763473336; bh=2B3RBOSE7CmxmQYzvtH+hFm8q9HZRTVj8NG7RykYiWI=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=naSJ79qdLKjk294duczCbiAbSE5o9fUwqTO8UYXwo2bOwQKNMoO7O7kNJiOqBEuTP oXc6bw0WRc5esLsVaF0JZ+aAHaroxNByPNGlCpDw2gesNZlo9BBvi36cE2lr3vVzsR IiwqI4P/kYSlXW8q8216N1O/Ad2L8mZDxP9EFxZlpfjaphsYoQHxsh9os8WOrTbYe+ Qgl/xkr8mH8p+YtPg2hbOERFsX0jxQjuJdrVKMVWjKypCXzz5L6zBb3BUVSzDGte+q CU+/SViotc4kRI/oA1gODPmdSKfFu+aGFn59auP1BJuE1pVhavuIlUTMdFze1DjOKd q/huUdixl/jHg== From: Pratyush Yadav To: Miquel Raynal Cc: Santhosh Kumar K , , , , , , , , , , , , , Subject: Re: [RFC PATCH 01/10] spi: spi-mem: Introduce support for tuning controller In-Reply-To: <87ecqcakjo.fsf@bootlin.com> (Miquel Raynal's message of "Wed, 05 Nov 2025 10:35:55 +0100") References: <20250811193219.731851-1-s-k6@ti.com> <20250811193219.731851-2-s-k6@ti.com> <87seguemzu.fsf@bootlin.com> <87qzunt4n4.fsf@bootlin.com> <87ecqcakjo.fsf@bootlin.com> Date: Tue, 18 Nov 2025 14:42:12 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Wed, Nov 05 2025, Miquel Raynal wrote: > Hello Santhosh, > >>>> - On tuning failure, retry by re-running spi_mem_needs_tuning() wi= th >>>> the second best set of ops (max throughput - 1) >>> I would like to challenge this need. Can the same calibration fail if >>> attempted multiple times (eg. because of the heat?) If yes, then we need >>> a fallback indeed. Otherwise, I'd be in favor of just failing the >>> probe. Calibration is an opt-in -> users must allow a higher frequency >>> than they use to in order to enable the feature? >> >> It's possible the same calibration will fail intermittently for >> different reasons (temperature changes, as you mentioned). If tuning >> fails, the driver should fallback to the non-PHY frequency so the flash >> continues operating with slower reads/writes rather than failing the >> probe (availability should be prioritized, right?). > > Agreed, if the tuning may fail we must fallback in this case. However > there is another situation that must be handled in this case: once > tuning is done and we want to use PHY-optimized paths, we must fallback > to more basic/slower reads if for some external reason, they start > failing, right? How would you even detect that your tuning is out-of-date because of temperature changes? You would need some sort of on-flash ECC to detect that. I think many of the flashes that support DDR reads at high frequencies also have ECC, but AFAIK the SPI NOR core does not support it. Anyway, I think we should limit the scope of the problem. Let's first start with the expectation that the tuning supports the whole operation range of the device. This was true at least for the spi-cadence-quadspi tuning that I worked on when I was at TI. The tuning parameters had enough margin to ensure it worked for the device's whole temperature range. If there is a tuning algorithm that can't do that, then we can extend the core to either do ECC or perhaps let temperature sensors signal the need for re-calibration. But for now I think it is easiest to just ignore the problem and focus on the other ones like how to get the calibration pattern and how to do the tuning. > > The obvious choice in this case would be to let this error handling to > the controller driver. Re-using the same operation at a lower speed > would be suboptimal, because the fastest operation at a high speed might > not be the most efficient at slower speeds due to the number of dummy > cycles needed,. But I believe this is negligible based on the fact that > we already are in degraded mode at that stage. > > However, this may conflict with: > - read retries > - continuous reads (?) > > So in practice the fallback might be needed on the SPI NAND/NOR side > (this can be further discussed). > > But once we solve this, comes a similar problem on the write side. How > do we know if a write will or did fail because of a temperature change? > What may be the heuristics to fallback in this case? Santhosh, do you have any numbers on write performance improvements? I am curious if it is even worth the effort. > > Thanks, > Miqu=C3=A8l --=20 Regards, Pratyush Yadav