From: David Mosberger <davidm@napali.hpl.hp.com>
To: linux-ia64@vger.kernel.org
Subject: [Linux-ia64] Re: ia64 cache flushing?
Date: Tue, 17 Dec 2002 02:15:28 +0000 [thread overview]
Message-ID: <marc-linux-ia64-105590709805588@msgid-missing> (raw)
In-Reply-To: <marc-linux-ia64-105590709805582@msgid-missing>
>>>>> On Tue, 17 Dec 2002 13:11:46 +1100, Rusty Russell <rusty@rustcorp.com.au> said:
Rusty> if (owner = me) should do this.
Rusty> On top of your patch and my previous, this works!
Good to see that.
For someone who cares about modules and ia64 performance: you might
want to consider to use "brl" in the PLT stub instead of the
standardized code sequence. That would avoid an indirect branch and
associated mis-prediction penalties. (Of course, this would be for
McKinley and later CPUs only as Merced doesn't implement "brl" in
hardware).
--david
next prev parent reply other threads:[~2002-12-17 2:15 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-12-16 23:22 [Linux-ia64] Re: ia64 cache flushing? Rusty Russell
2002-12-17 0:25 ` Richard Henderson
2002-12-17 0:27 ` Rusty Russell
2002-12-17 1:14 ` Rusty Russell
2002-12-17 1:32 ` Richard Henderson
2002-12-17 2:11 ` Rusty Russell
2002-12-17 2:15 ` David Mosberger [this message]
2002-12-17 3:42 ` Richard Henderson
2002-12-17 3:50 ` David Mosberger
2002-12-17 7:20 ` Richard Henderson
2002-12-19 23:15 ` David Mosberger
2002-12-20 0:56 ` Richard Henderson
2002-12-20 1:07 ` David Mosberger
2002-12-20 1:18 ` Richard Henderson
2002-12-20 1:20 ` David Mosberger
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