From: "R. Lake" <rich@lakes.plus.com>
To: linux-ia64@vger.kernel.org
Subject: Re: load-store emulation with SIGSEGV
Date: Fri, 17 Oct 2003 08:13:31 +0000 [thread overview]
Message-ID: <marc-linux-ia64-106637851925948@msgid-missing> (raw)
In-Reply-To: <marc-linux-ia64-106634457403703@msgid-missing>
> Rich> I'm investigating a means of emulating causes of SEGV where
> Rich> they can be isolated from genuine failure. For example, a rule
> Rich> stating a load from address 0x100 "loads" the value 42 into
> Rich> the target register.
>
> I'm not entirely sure I understand what you're trying to do and
> whether you're doing it in the kernel or user (signal-handler). If
> the latter, adjusting the sc_ip should be sufficient (the slot number
> is encoded in bits 0 and 1 of sc_ip).
>
> --david
The current implementation is a user mode signal handler, so as you say
adjusting sc_ip ought to be okay. I'll run some more thorough asm tests to
check my usage of rse_skip_regs and make certain subsequent instructions are
executed from the faulting bundle. Thanks for your help.
Regards,
Richard.
next prev parent reply other threads:[~2003-10-17 8:13 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-10-16 22:49 load-store emulation with SIGSEGV R. Lake
2003-10-16 22:49 ` R. Lake
2003-10-16 22:49 ` R. Lake
2003-10-16 22:51 ` R. Lake
2003-10-16 22:51 ` R. Lake
2003-10-16 23:57 ` David Mosberger
2003-10-17 8:13 ` R. Lake [this message]
2003-10-17 15:11 ` Matt Chapman
2003-10-17 18:16 ` Jim Hull
2003-10-17 18:54 ` David Mosberger
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