From: David Mosberger <davidm@napali.hpl.hp.com>
To: linux-ia64@vger.kernel.org
Subject: RE: Problem with accessing page tables
Date: Tue, 11 Nov 2003 07:33:04 +0000 [thread overview]
Message-ID: <marc-linux-ia64-106853600011735@msgid-missing> (raw)
In-Reply-To: <marc-linux-ia64-106826502101883@msgid-missing>
>>>>> On Tue, 11 Nov 2003 10:32:42 +0530, "Ameya Mitragotri" <ameya.mitragotri@wipro.com> said:
Ameya> Our assumption is that the addresses for the global variables
Ameya> will surely be allocated. (e.g. &panic_timeout should always
Ameya> resolve to an available PGD,PMD,PTE and in the end to a
Ameya> page.)
Nope, that's a bad assumption. The kernel's page-table is strictly
needed only for vmalloc'd memory. Whether or not it's used to map the
kernel itself, is architecture-specific. In the case of ia64, we use
an identity-mapping for kernel memory (the kernel itself is pinned
into the data TLB), so no page-tables are used.
Ameya> The whole purpose of this being, We want to simulate the page
Ameya> tables at user level to analyse a crash dump (LKCD) on
Ameya> IA64. So we dump the page tables and when Lcrash (the user
Ameya> mode tool for analysing dumps) reads this dump, it can seek
Ameya> the page tables and access global variables accordingly. This
Ameya> also will help us eventually in unwinding the dumped stack.
In the 2.6 kernel, the kernel image is pinned into the D TLB at
address 0xa000000100000000. This _usually_ maps to physical address
64MB, but under certain circumstances (e.g., lack of memory at 64MB,
kernel image replication for better NUMA-locality), it may map to some
other physical address.
--david
prev parent reply other threads:[~2003-11-11 7:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-11-08 4:28 Problem with accessing page tables Ameya Mitragotri
2003-11-08 7:10 ` David Mosberger
2003-11-08 7:58 ` Ameya Mitragotri
2003-11-10 21:45 ` David Mosberger
2003-11-11 5:14 ` Ameya Mitragotri
2003-11-11 7:33 ` David Mosberger [this message]
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