From: "David S. Miller" <davem@dm.cobaltmicro.com>
To: ultralinux@vger.kernel.org
Subject: Re: UltraSPARC lock performance
Date: Sat, 16 May 1998 19:45:27 +0000 [thread overview]
Message-ID: <marc-linux-ultrasparc-90222356531043@msgid-missing> (raw)
In-Reply-To: <marc-linux-ultrasparc-90222356531041@msgid-missing>
We use CAS where applicable in the Ultra SMP support code.
Also your claims about ldstub are incorrect, they do not lock the bus,
just like CAS, if the L2 cache line being accessed is valid and owned
exclusively, as per the UPA interface documentation in the UltraSparc
programmers manuals.
What you are seeing is the difference between wait free algorithms and
spinlock based resource protection in general, which you failed to
mention at all.
Later,
David S. Miller
davem@dm.cobaltmicro.com
prev parent reply other threads:[~1998-05-16 19:45 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
1998-05-16 16:52 UltraSPARC lock performance Mike Bennett
1998-05-16 19:45 ` David S. Miller [this message]
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