[Xen-devel] [ovmf test] 145902: regressions - FAIL

[osstest service owner <osstest-admin@xenproject.org>]

flight 145902 ovmf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/145902/

Regressions :-(

Tests which did not succeed and are blocking,
including tests which could not be run:
 test-amd64-amd64-xl-qemuu-ovmf-amd64 10 debian-hvm-install fail REGR. vs. 145767
 test-amd64-i386-xl-qemuu-ovmf-amd64 10 debian-hvm-install fail REGR. vs. 145767

version targeted for testing:
 ovmf                 e18792566c7fb1335e705c3b19334db9271eac90
baseline version:
 ovmf                 70911f1f4aee0366b6122f2b90d367ec0f066beb

Last test of basis   145767  2020-01-08 00:39:09 Z    2 days
Failing since        145774  2020-01-08 02:50:20 Z    2 days   11 attempts
Testing same since   145902  2020-01-10 02:52:50 Z    0 days    1 attempts

------------------------------------------------------------
People who touched revisions under test:
  Ard Biesheuvel <ard.biesheuvel@linaro.org>
  Ashish Singhal <ashishsingha@nvidia.com>
  Eric Dong <eric.dong@intel.com>
  Laszlo Ersek <lersek@redhat.com>
  Pavana.K <pavana.k@intel.com>
  Philippe Mathieu-Daud? <philmd@redhat.com>
  Philippe Mathieu-Daude <philmd@redhat.com>
  Siyuan Fu <siyuan.fu@intel.com>
  Siyuan, Fu <siyuan.fu@intel.com>

jobs:
 build-amd64-xsm                                              pass    
 build-i386-xsm                                               pass    
 build-amd64                                                  pass    
 build-i386                                                   pass    
 build-amd64-libvirt                                          pass    
 build-i386-libvirt                                           pass    
 build-amd64-pvops                                            pass    
 build-i386-pvops                                             pass    
 test-amd64-amd64-xl-qemuu-ovmf-amd64                         fail    
 test-amd64-i386-xl-qemuu-ovmf-amd64                          fail    


------------------------------------------------------------
sg-report-flight on osstest.test-lab.xenproject.org
logs: /home/logs/logs
images: /home/logs/images

Logs, config files, etc. are available at
    http://logs.test-lab.xenproject.org/osstest/logs

Explanation of these reports, and of osstest in general, is at
    http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README.email;hb=master
    http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README;hb=master

Test harness code can be found at
    http://xenbits.xen.org/gitweb?p=osstest.git;a=summary


Not pushing.

------------------------------------------------------------
commit e18792566c7fb1335e705c3b19334db9271eac90
Author: Eric Dong <eric.dong@intel.com>
Date:   Thu Jan 9 13:21:36 2020 +0800

    UefiCpuPkg/PiSmmCpuDxeSmm: Add missed comments for parameter.
    
    This issue caused by below change:
      SHA-1: b948a496150f4ae4f656c0f0ab672608723c80e6
      * UefiCpuPkg/PiSmmCpuDxeSmm: Pre-allocate PROCEDURE_TOKEN buffer
      REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2388
    
    Reviewed-by: Ray Ni <ray.ni@intel.com>
    Acked-by: Laszlo Ersek <lersek@redhat.com>
    Signed-off-by: Eric Dong <eric.dong@intel.com>

commit f55477fe2d62687ae0b91e3c5e68db2c22cbaf5c
Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date:   Wed Jan 8 15:38:43 2020 +0100

    OvmfPkg: use HII type PCDs for TPM2 config related variables
    
    The HII pages that are part of Tcg2ConfigDxe expect the following PCDs
    to be of dynamic HII type, so declare them as such.
    
      gEfiSecurityPkgTokenSpaceGuid.PcdTcgPhysicalPresenceInterfaceVer
      gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev
    
    Currently, the TPM2 ACPI table is not produced, since we do not
    incorporate the Tcg2Smm module, which implements the SMI based
    physical presence interface exposed to the OS.
    
    Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
    Reviewed-by: Laszlo Ersek <lersek@redhat.com>

commit cf3ad972a2105ffa3795ddb1d9c149c7fc369f9b
Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date:   Wed Jan 8 15:38:42 2020 +0100

    OvmfPkg: reorganize TPM2 support in DSC/FDF files
    
    Put the TPM2 related DXE modules together in the DSC, and add a
    TPM2 support header comment while at it.
    
    Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
    Reviewed-by: Laszlo Ersek <lersek@redhat.com>

commit 2649a735b249e54a4ddd7bd2b8d62bfe77e8d6da
Author: Philippe Mathieu-Daud? <philmd@redhat.com>
Date:   Thu Jan 2 20:16:56 2020 +0800

    BaseTools/PatchCheck.py: Ignore CR and LF characters in subject length
    
    REF: https://bugzilla.tianocore.org/show_bug.cgi?id=113
    
    Strip the trailing characters before checking the subject line is
    less than 72 characters.
    
    Fixes: e61406708c83f
    Cc: Liming Gao <liming.gao@intel.com>
    Cc: Jordan Justen <jordan.l.justen@intel.com>
    Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
    Reviewed-by: Bob Feng <bob.c.feng@intel.com>
    
    Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>

commit 972d88726410e21b1fff1a528854202c67e97ef1
Author: Ashish Singhal <ashishsingha@nvidia.com>
Date:   Tue Dec 24 10:57:47 2019 +0800

    MdeModulePkg: Add EDK2 Platform Boot Manager Protocol
    
    Add edk2 platform boot manager protocol which would have platform
    specific refreshes to the auto enumerated as well as NV boot options
    for the platform.
    
    Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com>
    Reviewed-by: Ray Ni <ray.ni@intel.com>

commit c9d72628432126cbce58a48b440e4944baa4beab
Author: Pavana.K <pavana.k@intel.com>
Date:   Thu Jan 2 20:30:27 2020 +0000

    CryptoPkg: Support for SHA384 & SHA512 RSA signing schemes
    
    BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2389
    
    Currently RSA signing scheme support is available for MD5, SHA-1 or
    SHA-256 algorithms.The fix is to extend this support for SHA384 and
    SHA512.
    
    Cc: Liming Gao <liming.gao@intel.com>
    Cc: Jian J Wang <jian.j.wang@intel.com>
    Cc: Bob Feng <bob.c.feng@intel.com>
    
    Signed-off-by: Pavana.K <pavana.k@intel.com>
    Reviewed-by: Jian J Wang <jian.j.wang@intel.com>

commit 396e791059f37062cbee85696e2b4186ec72a9e3
Author: Siyuan, Fu <siyuan.fu@intel.com>
Date:   Fri Jan 3 14:59:27 2020 +0800

    UefiCpuPkg: Always load microcode patch on AP processor.
    
    This patch updates the microcode loader to always perform a microcode
    detect and load on both BSP and AP processor. This is to fix a potential
    microcode revision mismatch issue in below situation:
    1. Assume there are two microcode co-exists in flash: one production
       version and one debug version microcode.
    2. FIT loads production microcode to BSP and all AP.
    3. UefiCpuPkg loader loads debug microcode to BSP, and skip the loading
       on AP.
    As a result, different microcode patches are loaded to BSP and AP, and
    trigger microcode mismatch error during OS boot.
    
    BZ link: https://bugzilla.tianocore.org/show_bug.cgi?id=2431
    
    Cc: Eric Dong <eric.dong@intel.com>
    Cc: Ray Ni <ray.ni@intel.com>
    Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
    Reviewed-by: Eric Dong <eric.dong@intel.com>

commit 08a475df10b75f84cdeb9b11e38f8eee9b5c048d
Author: Siyuan Fu <siyuan.fu@intel.com>
Date:   Fri Jan 3 15:11:51 2020 +0800

    UefiCpuPkg: Remove alignment check when calculate microcode size.
    
    This patch removes the unnecessary alignment check on microcode patch
    TotalSize introduced by commit d786a172. The TotalSize has already been
    checked with 1K alignment and MAX_ADDRESS in previous code as below:
    
        if ( (UINTN)MicrocodeEntryPoint > (MAX_ADDRESS - TotalSize) ||
             ((UINTN)MicrocodeEntryPoint + TotalSize) > MicrocodeEnd ||
             (DataSize & 0x3) != 0 ||
             (TotalSize & (SIZE_1KB - 1)) != 0 ||
             TotalSize < DataSize
           ) {
    
    Cc: Eric Dong <eric.dong@intel.com>
    Cc: Ray Ni <ray.ni@intel.com>
    Cc: Hao A Wu <hao.a.wu@intel.com>
    Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
    Reviewed-by: Ray Ni <ray.ni@intel.com>
    Reviewed-by: Eric Dong <eric.dong@intel.com>

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