From: Platform Team regression test user <citrix-osstest@xenproject.org>
To: xen-devel@lists.xensource.com, osstest-admin@xenproject.org
Subject: [ovmf baseline-only test] 72074: all pass
Date: Fri, 8 Sep 2017 13:27:38 +0100 [thread overview]
Message-ID: <osstest-72074-mainreport@xen.org> (raw)
This run is configured for baseline tests only.
flight 72074 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/72074/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf c50596a701435b62dc7e9c12b49201a17c38e17c
baseline version:
ovmf 89796c69d9fdaa9bd13d37b6b1687df5e0104ed5
Last test of basis 72072 2017-09-07 15:49:09 Z 0 days
Testing same since 72074 2017-09-08 06:34:43 Z 0 days 1 attempts
------------------------------------------------------------
People who touched revisions under test:
Jiewen Yao <jiewen.yao@intel.com>
jobs:
build-amd64-xsm pass
build-i386-xsm pass
build-amd64 pass
build-i386 pass
build-amd64-libvirt pass
build-i386-libvirt pass
build-amd64-pvops pass
build-i386-pvops pass
test-amd64-amd64-xl-qemuu-ovmf-amd64 pass
test-amd64-i386-xl-qemuu-ovmf-amd64 pass
------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images
Logs, config files, etc. are available at
http://osstest.xs.citrite.net/~osstest/testlogs/logs
Test harness code can be found at
http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary
Push not applicable.
------------------------------------------------------------
commit c50596a701435b62dc7e9c12b49201a17c38e17c
Author: Jiewen Yao <jiewen.yao@intel.com>
Date: Mon Sep 4 09:50:25 2017 +0800
IntelSiliconPkg/IntelVtd: Consume VTd policy PCD
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
commit 0d12b733060930df03fca00ae1228b565481a3aa
Author: Jiewen Yao <jiewen.yao@intel.com>
Date: Mon Sep 4 09:49:55 2017 +0800
IntelSiliconPkg/dec: Add VTd policy PCD
BIT0: This is to control if a platform wants to enable VTd
based protection during boot.
BIT1: This is to control if a platform wants to keep VTd
enabled at ExitBootService.
The default configuration is BIT0:1, BIT1:0.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
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