From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Eo76R-0004ce-Ie for qemu-devel@nongnu.org; Sun, 18 Dec 2005 17:34:03 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Eo76Q-0004as-1S for qemu-devel@nongnu.org; Sun, 18 Dec 2005 17:34:03 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Eo76P-0004ah-TH for qemu-devel@nongnu.org; Sun, 18 Dec 2005 17:34:01 -0500 Received: from [80.91.229.2] (helo=ciao.gmane.org) by monty-python.gnu.org with esmtp (TLS-1.0:RSA_AES_128_CBC_SHA:16) (Exim 4.34) id 1Eo79G-0000PV-1o for qemu-devel@nongnu.org; Sun, 18 Dec 2005 17:36:58 -0500 Received: from list by ciao.gmane.org with local (Exim 4.43) id 1Eo740-00073M-56 for qemu-devel@nongnu.org; Sun, 18 Dec 2005 23:31:32 +0100 Received: from a84-231-2-208.elisa-laajakaista.fi ([84.231.2.208]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Sun, 18 Dec 2005 23:31:32 +0100 Received: from ananaza by a84-231-2-208.elisa-laajakaista.fi with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Sun, 18 Dec 2005 23:31:32 +0100 From: Antti P Miettinen Date: Mon, 19 Dec 2005 00:29:42 +0200 Message-ID: References: <200512150000.07159.paul@codesourcery.com> <200512181651.02705.paul@codesourcery.com> <20051218172558.GA446@nevyn.them.org> <20051218.104216.28085930.imp@bsdimp.com> <20051218175430.GA1580@nevyn.them.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Sender: news Subject: [Qemu-devel] ARM page crossing inside insn? (Re: ARM ethernet fixes) Reply-To: ananaza@iki.fi, qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Antti P Miettinen writes: > Looks like the kernel somehow ends up thinking that we are loading > something from zero. Hmm.. the value being loaded to r1 is zero. So > could this be related to crossing a page boundary in the middle of an > instruction? But anyway - I'll try to debug this further.. Looks like it might be the page crossing. The below little program is a bit smaller test case. Without args, no segfault, with arg it segfaults (inside ARM sysemu - at least for me): #include #include long buf[8192/4]; int main(int ac, char **av) { unsigned long base = (unsigned long)(void *)(buf + 4096/4); unsigned long dummy; if (ac > 1) { base &= ~0xfff; base -= 4; } printf("buf: %p, base: 0x%08lx, dummy: 0x%08lx\n", buf, base, dummy); __asm__ __volatile__ ("ldmia %0,{%1,%2}" : "=r" (base) : "0" (base), "r" (dummy)); printf("base: 0x%08lx, dummy: 0x%08lx\n", base, dummy); return 0; } -- http://www.iki.fi/~ananaza/