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From: Andi Kleen <andi@firstfloor.org>
To: "Dan Gora" <dan.gora@gmail.com>
Cc: linux-kernel@vger.kernel.org
Subject: Re: PCI Bursting with PIO
Date: Fri, 15 Feb 2008 11:54:50 +0100	[thread overview]
Message-ID: <p73abm21ocl.fsf@bingen.suse.de> (raw)
In-Reply-To: <4779de450802141928led16cebkfb989551eb88a8cb@mail.gmail.com> (Dan Gora's message of "Thu\, 14 Feb 2008 19\:28\:55 -0800")

"Dan Gora" <dan.gora@gmail.com> writes:
>
> Is there any way to get PIO 

I assume you really mean MMIO, not PIO. PIO would be port IO.

> to burst over the PCI bus in the read and
> write direction? 

You should set the MMIO mapping to write combining using an MTRR
You might need to add appropiate memory barriers if you rely
on write ordering though.

-Andi

  reply	other threads:[~2008-02-15 10:54 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-02-15  3:28 PCI Bursting with PIO Dan Gora
2008-02-15 10:54 ` Andi Kleen [this message]
2008-02-15 17:55   ` Dan Gora
2008-02-15 13:02 ` Alan Cox
2008-02-15 18:00   ` Dan Gora
2008-02-15 18:41     ` H. Peter Anvin
2008-02-15 19:00     ` Alan Cox
     [not found] <fa.Mbzb1/2dWnp5V/5ElzijlkAstZU@ifi.uio.no>
2008-02-16  6:00 ` Robert Hancock
2008-02-17  4:53   ` Dan Gora
     [not found] <fa.QF1nJvJhMpLvtquNDa6sbADHwhs@ifi.uio.no>
     [not found] ` <fa.LrKLA2l3F3abMpHk4aDjFfwzFVI@ifi.uio.no>
     [not found]   ` <fa.kFanAY/O5VMnSf6YXqEyxmsR62U@ifi.uio.no>
2008-02-17 19:06     ` Robert Hancock

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