[PATCH 12/16] powerpc: reduce and comment xics ipi memory barrier

[Milton Miller <miltonm@bga.com>]

A single full sync (mb()) is requrired to order the mmio to the qirr reg
with the set or clear of the message word.  However, test_and_clear_bit
has the effect of smp_mb() and we are not doing any other io from here,
so we don't need a mb per bit processed.

Signed-off-by: Milton Miller <miltonm@bga.com>

Index: next.git/arch/powerpc/platforms/pseries/xics.c
===================================================================
--- next.git.orig/arch/powerpc/platforms/pseries/xics.c	2008-10-04 23:56:15.000000000 -0500
+++ next.git/arch/powerpc/platforms/pseries/xics.c	2008-10-05 00:01:26.000000000 -0500
@@ -498,26 +498,23 @@ static irqreturn_t xics_ipi_dispatch(int
 {
 	WARN_ON(cpu_is_offline(cpu));
 
+	mb();	/* order mmio clearing qirr */
 	while (xics_ipi_message[cpu].value) {
 		if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
 				       &xics_ipi_message[cpu].value)) {
-			mb();
 			smp_message_recv(PPC_MSG_CALL_FUNCTION);
 		}
 		if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
 				       &xics_ipi_message[cpu].value)) {
-			mb();
 			smp_message_recv(PPC_MSG_RESCHEDULE);
 		}
 		if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE,
 				       &xics_ipi_message[cpu].value)) {
-			mb();
 			smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
 		}
 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 		if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
 				       &xics_ipi_message[cpu].value)) {
-			mb();
 			smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
 		}
 #endif