[PATCH 0 of 3] Avoid sharing vectors within a device when using an AMD IOMMU

[George Dunlap <george.dunlap@eu.citrix.com>]

The interrupt remapping tables on AMD IOMMUs index by vector only.
This means that if two MSIs go through the table that are destined for
different cpus, but they share the same vector, they will be
redirected to the same place.  (E.g., one interrupt on p5 vector 67,
another interrupt on p7 vector 67; both will be redirected to the same
place.)

Introducing per-device interrupt mappings reduces the problem, but
does not solve it completely if the same device can have multiple IRQs
assigned to it, because you can get the same issue -- two different
IRQs from the same device can be assigned the same vector on different
cpus.  This causes one of the IRQs to activated when either interrupt
is triggered, and the other IRQ to never receive any interrupts.

This series consists of three patches:

1: Introduce infrastructure to allow irqs to share vector maps.  Any
IRQs sharing the same vector map will never have vector collisions.

2: Introduce option to have per-device vector maps for MSI IRQs.

3: Automatically enable per-device vector maps when running on an AMD
system with the IOMMU enabled, unless otherwise specified.