From: Takashi Iwai <tiwai@suse.de>
To: Jim <jbuckeyne@greater.net>
Cc: alsa-devel@lists.sourceforge.net
Subject: Re: Just a quick question...Damn - last msg w/ continue
Date: Thu, 15 Aug 2002 12:33:06 +0200 [thread overview]
Message-ID: <s5h7kismmxp.wl@alsa2.suse.de> (raw)
In-Reply-To: <01a401c24412$20cc1160$3c01a8c0@apprentice>
At Wed, 14 Aug 2002 21:13:36 -0700,
Jim wrote:
>
> > > Unfortunately the i810 driver is one of the undisclosed code family. I
> > > haven't used the nforce so I don't know about it.
>
> I went out looking for information - being from Intel - SURELY it's
> documented, and such information is publicly available.... I've found a
> plethora of information - but everything about the design of the ac97 spec
> indicates one register set, one set of dmas ... one could interpret one
> portion... there's 256 ranges of base registers one can select - but then
> you'd have a full set of mixing registers etc - just totally impracticle :/
> and therefore 256*3 dma units ... which isn't all that much memory andwidth
> at 256*44.1khz*16*2 is only 45MB/sec ... less than a hard disk... and I
> don't understand the PCI interface entirely.... but then I did go back to
> nVidia's page on the nForce chip
> http://www.nvidia.com/docs/lo/557/SUPP/nForce_MCP_Overview.pdf
> and amidst all of that it says - DirectX blahblah 256 channels audio blah 64
> 3d ... and I think however that these are accomplished in software, and that
> the hardware spec has nothing to do with this... and this minor 'marketing
> hype' has been trimmed to be
> 'motherboard - audio- ac97 with 256 channels.'
> though appropritely marketed as
> ' motherboard - audio - Direct Sound AC97 Audio'
>
> went out for a general search at the conclusion of my wanderings and find
> that the maestro indeed has 64 register sets - which when a audio interrupt
> is received would greatly increase the time to figure out uhh which
> (virtual) card has the completion event...
>
> excerpt from maestro.c changelog
> Then we have beasts
> 90 * like the APU interface that is indirect registers gotten at
> through
> 91 * the main maestro indirection. Ouch. We spinlock around the
> actual
> 92 * ports on a per card basis. This means spinlock activity at each
> IO
> 93 * operation, but the only IO operation clusters are
>
>
> Okay - so I'm over it. now - wonder if I should use JACK or ESD?
yes, unless your cards support it :)
(or alternatively artsd, too.)
the drivers with hardware mixing are:
emu10k1, trident, ali5451, ymfpci, es1968, maestro3, cs46xx, gus*
Takashi
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prev parent reply other threads:[~2002-08-15 10:33 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-08-15 4:13 Just a quick question...Damn - last msg w/ continue Jim
2002-08-15 10:33 ` Takashi Iwai [this message]
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