From mboxrd@z Thu Jan 1 00:00:00 1970 From: Takashi Iwai Subject: Re: PCI write barrier Date: Fri, 23 May 2003 12:30:14 +0200 Sender: alsa-devel-admin@lists.sourceforge.net Message-ID: References: Mime-Version: 1.0 (generated by SEMI 1.14.4 - "Hosorogi") Content-Type: text/plain; charset=US-ASCII Return-path: In-Reply-To: Errors-To: alsa-devel-admin@lists.sourceforge.net List-Help: List-Post: List-Subscribe: , List-Unsubscribe: , List-Archive: To: Giuliano Pochini Cc: alsa-devel@lists.sourceforge.net List-Id: alsa-devel@alsa-project.org At Thu, 22 May 2003 15:16:44 +0200 (CEST), Giuliano Pochini wrote: > > > I was reading this: http://people.redhat.com/arjanv/olspaper.pdf. It > says (page 4, par5.1) the PCI controller is allowed to delay writes > as long as it likes and a read operation flushes all pending writes. > Is it true ? I had a quick look at some ALSA drivers, but I couldn't > find any barrier or any apparent useless read after a write. you are right. this issue is not taken into account in most of drivers codes, in the case of non-memory-mapped access. i think this should be solved in the kernel core side, e.g. providing special pci access functions set, though. Takashi ------------------------------------------------------- This SF.net email is sponsored by: ObjectStore. If flattening out C++ or Java code to make your application fit in a relational database is painful, don't do it! Check out ObjectStore. Now part of Progress Software. http://www.objectstore.net/sourceforge