From mboxrd@z Thu Jan 1 00:00:00 1970 From: Takashi Iwai Subject: Re: [PATCH v3 4/5] ALSA - hda: Add support for parsing new HDA capabilities Date: Wed, 03 Aug 2016 18:11:28 +0200 Message-ID: References: <1470240374-20018-1-git-send-email-vinod.koul@intel.com> <1470240374-20018-5-git-send-email-vinod.koul@intel.com> Mime-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) by alsa0.perex.cz (Postfix) with ESMTP id 34444267652 for ; Wed, 3 Aug 2016 18:11:29 +0200 (CEST) In-Reply-To: <1470240374-20018-5-git-send-email-vinod.koul@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org To: Vinod Koul Cc: alsa-devel@alsa-project.org, patches.audio@intel.com, Hardik T Shah , Guneshwor Singh , liam.r.girdwood@linux.intel.com, broonie@kernel.org List-Id: alsa-devel@alsa-project.org On Wed, 03 Aug 2016 18:06:13 +0200, Vinod Koul wrote: > > --- a/sound/pci/hda/hda_intel.c > +++ b/sound/pci/hda/hda_intel.c > @@ -1655,6 +1655,22 @@ static int azx_first_init(struct azx *chip) > return -ENXIO; > } > > + if (IS_SKL_PLUS(pci)) > + snd_hdac_bus_parse_capabilities(bus); > + > + /* > + * Some Intel CPUs has always running timer (ART) feature and > + * controller may have Global time sync reporting capability, so > + * check both of these before declaring synchronized time reporting > + * capability SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME > + */ > + chip->gts_present = false; > + > +#ifdef CONFIG_X86 > + if ((bus->ppcap && boot_cpu_has(X86_FEATURE_ART))) Superfluous parentheses. Also, don't we need to include asm/cpufeature.h? Takashi