From mboxrd@z Thu Jan 1 00:00:00 1970 From: Takashi Iwai Subject: Re: [PATCH 1/2 v2] ASoC: soc-cache: block based rbtree compression Date: Tue, 03 May 2011 17:54:21 +0200 Message-ID: References: <20110503132420.GM1762@opensource.wolfsonmicro.com> <20110503135117.GA2893@sirena.org.uk> <20110503142729.GP1762@opensource.wolfsonmicro.com> <20110503152405.GV1762@opensource.wolfsonmicro.com> <20110503154043.GW1762@opensource.wolfsonmicro.com> <20110503154847.GY1762@opensource.wolfsonmicro.com> Mime-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mx1.suse.de (cantor.suse.de [195.135.220.2]) by alsa0.perex.cz (Postfix) with ESMTP id 7E7031038CB for ; Tue, 3 May 2011 17:54:24 +0200 (CEST) In-Reply-To: <20110503154847.GY1762@opensource.wolfsonmicro.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: alsa-devel-bounces@alsa-project.org Errors-To: alsa-devel-bounces@alsa-project.org To: Mark Brown Cc: Dimitris Papastamos , alsa-devel@alsa-project.org, patches@opensource.wolfsonmicro.com, Liam Girdwood , Liam Girdwood List-Id: alsa-devel@alsa-project.org At Tue, 3 May 2011 16:48:47 +0100, Mark Brown wrote: > > On Tue, May 03, 2011 at 05:47:07PM +0200, Takashi Iwai wrote: > > > IMO, it's easier to expose an API that allows the update of an > > register array. The rest is a job of the cache backend stuff. > > As a fallback, it can be a loop of the single read/write. > > We'll want to do that as well, but we still want the actual data > structure underneath to support that. Since most register maps that > benefit from compression are also sparse rbtree is the common case for > getting a win from this. Hm, but iteration in the sorted order is pretty easy and cheap in rb-tree structure. It's not necessarily to be exported in an array. Takashi