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From: Takashi Iwai <tiwai@suse.de>
To: Pavel Hofman <pavel.hofman@insite.cz>
Cc: alsa-devel@alsa-project.org
Subject: Re: Fixes in intel8x0.c
Date: Tue, 26 May 2009 08:01:14 +0200	[thread overview]
Message-ID: <s5htz385ro5.wl%tiwai@suse.de> (raw)
In-Reply-To: <4A1B276A.4080107@insite.cz>

At Tue, 26 May 2009 01:19:06 +0200,
Pavel Hofman wrote:
> 
> Hi,
> 
> while trying to dive into complexities of intel8x0.c I found the following:
> 
> static struct snd_pci_quirk intel8x0_clock_list[] __devinitdata = {
> 	SND_PCI_QUIRK(0x0e11, 0x008a, "AD1885", 41000),
> 	SND_PCI_QUIRK(0x1028, 0x00be, "AD1885", 44100),
> .....
> 
> Is it really supposed to be 41000, instead of 44100?

Looks like so, judging from the patch Jaroslav wrote.

> In static int snd_intel8x0_pcm_open(struct snd_pcm_substream *substream,
> struct ichdev *ichdev)
> ...
> 	runtime->hw.rates = ichdev->pcm->rates;
> 
> The pcm field in ichdev is snd_ac97, while the rates field in snd_ac97
> is defined
> 
> unsigned int rates[6];	/* see AC97_RATES_* defines */
> 
> I guess this way always rates[0] from the list is taken, unlike e.g. in
> via82xx.c: runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF];

41000 is the base clock.  The actual rate written is

	rate * clock / 48000

Normally the base clock is 48000.  But some boards have a different
base clock and the rate has to be adjusted to match with that.


Takashi

  reply	other threads:[~2009-05-26  6:01 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-05-25 23:19 Fixes in intel8x0.c Pavel Hofman
2009-05-26  6:01 ` Takashi Iwai [this message]
2009-05-26  8:09   ` Pavel Hofman
2009-05-26  8:26     ` Takashi Iwai
2009-05-26  9:55       ` Pavel Hofman
2009-05-26  9:57         ` Takashi Iwai

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