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From: sashiko-bot@kernel.org
To: "Changhuang Liang" <changhuang.liang@starfivetech.com>
Cc: linux-clk@vger.kernel.org
Subject: Re: [PATCH v1 4/6] clk: starfive: Add JHB100 System-0 clock generator driver
Date: Tue, 13 Oct 2026 10:42:12 +0000	[thread overview]
Message-ID: <sashiko-outbox-169533@kernel.org> (raw)
In-Reply-To: <20261013102707.9207-5-changhuang.liang@starfivetech.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] clk: build failure due to missing dt-bindings header
--

commit bbdcc1dbc4e98a647c4ae9d5b0470ea19333afe4
Author: Changhuang Liang <changhuang.liang@starfivetech.com>

clk: starfive: Add JHB100 System-0 clock generator driver
    
Add support for JHB100 System-0 clock generator (SYS0CRG).

> diff --git a/drivers/clk/starfive/clk-starfive-jhb100-sys0.c b/drivers/clk/starfive/clk-starfive-jhb100-sys0.c
> new file mode 100644
> index 0000000000000..dd4d65f4e6828
> --- /dev/null
> +++ b/drivers/clk/starfive/clk-starfive-jhb100-sys0.c
> @@ -0,0 +1,148 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * StarFive JHB100 System-0 Clock Driver
> + *
> + * Copyright (C) 2024 StarFive Technology Co., Ltd.
> + *
> + * Author: Changhuang Liang <changhuang.liang@starfivetech.com>
> + *
> + */
> +
> +#include <dt-bindings/clock/starfive,jhb100-crg.h>

[Severity: Low]
Is this header file missing from the commit? This header doesn't seem to be
included in this patch or any other patch in the series, which results in a
build failure when compiling drivers/clk/starfive/clk-starfive-jhb100-sys0.c
with CLK_STARFIVE_JHB100_SYS0 enabled.

[ ... ]

> +static const struct jh71x0_clk_data jhb100_sys0crg_clk_data[] = {
> +	/* bmcpcierp */
> +	JH71X0__DIV(JHB100_SYS0CLK_BMCPCIERP_NCNOC_MAIN, "bmcpcierp_ncnoc_main", 6,
> +		    JHB100_SYS0CLK_PLL0),

[Severity: Low]
Will this lead to further compilation errors due to the missing header? In
jhb100_sys0crg_clk_data, array indices depend on macros like
JHB100_SYS0CLK_BMCPCIERP_NCNOC_MAIN which are expected to be provided by the
missing dt-bindings header.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261013102707.9207-1-changhuang.liang@starfivetech.com?part=4

  reply	other threads:[~2026-10-13 10:42 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-13 10:27 [PATCH v1 0/6] Add System-0 CRG for JHB100 SoC Changhuang Liang
2026-10-13 10:27 ` Changhuang Liang
2026-10-13 10:27 ` [PATCH v1 1/6] clk: starfive: jh7110-sys: Fix memory leak in reset controller register Changhuang Liang
2026-10-13 10:27   ` Changhuang Liang
2026-10-13 10:27 ` [PATCH v1 2/6] clk: starfive: jh71x0: Move reset controller registration to jh71x0 common code Changhuang Liang
2026-10-13 10:27   ` Changhuang Liang
2026-10-13 10:27 ` [PATCH v1 3/6] clk: starfive: jh71x0: Add generic CRG probe helper Changhuang Liang
2026-10-13 10:27   ` Changhuang Liang
2026-10-13 10:27 ` [PATCH v1 4/6] clk: starfive: Add JHB100 System-0 clock generator driver Changhuang Liang
2026-10-13 10:27   ` Changhuang Liang
2026-10-13 10:42   ` sashiko-bot [this message]
2026-10-13 10:27 ` [PATCH v1 5/6] reset: starfive: jh71x0: Support discontiguous reset IDs Changhuang Liang
2026-10-13 10:27   ` Changhuang Liang
2026-10-13 10:27 ` [PATCH v1 6/6] reset: starfive: Add StarFive JHB100 System-0 reset driver Changhuang Liang
2026-10-13 10:27   ` Changhuang Liang
2026-10-13 10:46   ` sashiko-bot

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