From: sashiko-bot@kernel.org
To: "Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 1/6] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add qcs8300 16 GT/s PHY
Date: Mon, 19 Oct 2026 09:29:42 +0000 [thread overview]
Message-ID: <sashiko-outbox-176907@kernel.org> (raw)
In-Reply-To: <20261019-monaco_ep-v2-1-852cb9f5d012@oss.qualcomm.com>
> The QCS8300 16 GT/s x4 QMP PCIe PHY was previously described using only
> the qcom,sa8775p-qmp-gen4x4-pcie-phy compatible, since no QCS8300-specific
> compatible existed for this PHY. This was a mistake, as it left the PHY
> undocumented as QCS8300 hardware and indistinguishable from SA8775P in
> the binding.
>
> Correct this by documenting a dedicated
> "qcom,qcs8300-qmp-gen4x4-pcie-phy" compatible, with
> "qcom,sa8775p-qmp-gen4x4-pcie-phy" listed as its fallback compatible.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Sashiko has reviewed this patch and found no issues.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261019-monaco_ep-v2-0-852cb9f5d012@oss.qualcomm.com?part=1
next prev parent reply other threads:[~2026-10-19 9:29 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-19 9:25 [PATCH v2 0/6] PCI: qcom-ep: Add PCIe Endpoint support for Monaco Krishna Chaitanya Chundru
2026-10-19 9:25 ` Krishna Chaitanya Chundru
2026-10-19 9:25 ` [PATCH v2 1/6] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add qcs8300 16 GT/s PHY Krishna Chaitanya Chundru
2026-10-19 9:25 ` Krishna Chaitanya Chundru
2026-10-19 9:29 ` sashiko-bot [this message]
2026-10-19 9:25 ` [PATCH v2 2/6] dt-bindings: PCI: qcom-ep: Add QCS8300 compatible Krishna Chaitanya Chundru
2026-10-19 9:25 ` Krishna Chaitanya Chundru
2026-10-19 9:29 ` sashiko-bot
2026-10-19 9:25 ` [PATCH v2 3/6] phy: qcom: qmp-pcie: Add endpoint PHY configuration for QCS8300 Krishna Chaitanya Chundru
2026-10-19 9:25 ` Krishna Chaitanya Chundru
2026-10-19 9:31 ` sashiko-bot
2026-10-19 9:25 ` [PATCH v2 4/6] PCI: qcom-ep: Set initial interconnect bandwidth before enabling clocks Krishna Chaitanya Chundru
2026-10-19 9:25 ` Krishna Chaitanya Chundru
2026-10-19 9:29 ` sashiko-bot
2026-10-19 9:25 ` [PATCH v2 5/6] arm64: qcom: monaco: Fix pcie1_phy compatible to list qcs8300 first Krishna Chaitanya Chundru
2026-10-19 9:25 ` Krishna Chaitanya Chundru
2026-10-19 9:30 ` sashiko-bot
2026-10-19 9:25 ` [PATCH v2 6/6] arm64: qcom: monaco: Add PCIe Endpoint nodes Krishna Chaitanya Chundru
2026-10-19 9:25 ` Krishna Chaitanya Chundru
2026-10-19 9:41 ` sashiko-bot
2026-10-19 9:41 ` sashiko-bot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=sashiko-outbox-176907@kernel.org \
--to=sashiko-bot@kernel.org \
--cc=krishna.chundru@oss.qualcomm.com \
--cc=linux-pci@vger.kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.