Re: [PATCH 3/3] arm64: dts: qcom: glymur-crd: Describe the PCIe M.2 Key B connector

[sashiko-bot@kernel.org]

> The Glymur CRD has a WWAN M.2 slot connected to PCIe6. Currently the
> vreg_wwan supply is described directly on the PCIe6 host bridge. As a
> result, the supply follows the PCIe controller power state and is turned
> off when the controller is powered down, regardless of the requirements
> of the device connected to the slot.
> 
> Move control of the WWAN supply to the generic
> pci-pwrctrl-slot/pwrseq-pcie-m2 framework. This allows slot power to be
> coordinated with PCI device power-management requirements and keeps the
> supply enabled when required by the PCI device, such as for PME-based
> wake-up.
> 
> Describe the slot as a PCIe M.2 Mechanical Key B connector and link it
> to the PCIe6 Root Port using a graph port/endpoint pair, as required by
> the pcie-m2-b-connector binding.
> 
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>

Sashiko has reviewed this patch and found no issues.

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Sashiko AI review · https://sashiko.dev/#/patchset/20261021-pcie6_fix-v1-0-ad37134c35a3@oss.qualcomm.com?part=3