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From: sashiko-bot@kernel.org
To: "Xincheng Ji" <jixincheng@ultrarisc.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v6 6/7] riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree
Date: Sat, 24 Oct 2026 09:41:08 +0000	[thread overview]
Message-ID: <sashiko-outbox-183626@kernel.org> (raw)
In-Reply-To: <20261024-ultrarisc-dts-v6-6-c62994d8a114@ultrarisc.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] riscv: dts: ultrarisc: dtc build error from duplicate @9000000 on plic
--

commit 5c5bd7084b50957dfbe0dd32f4f9ea2d09255694
Author: Jia Wang <wangjia@ultrarisc.com>

riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree

This commit adds the device tree and pinctrl definitions for the Shenzhen
Rongda M0 mATX motherboard based on the UltraRISC DP1000 SoC, and enables
building dp1000-shenrongda-m0.dtb under CONFIG_ARCH_ULTRARISC.

> diff --git a/arch/riscv/boot/dts/ultrarisc/Makefile b/arch/riscv/boot/dts/ultrarisc/Makefile
> new file mode 100644
> index 0000000000000..454d849a6ce4c
> --- /dev/null
> +++ b/arch/riscv/boot/dts/ultrarisc/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_ULTRARISC) += dp1000-shenrongda-m0.dtb
> diff --git a/arch/riscv/boot/dts/ultrarisc/dp1000-shenrongda-m0-pinctrl.dtsi b/arch/riscv/boot/dts/ultrarisc/dp1000-shenrongda-m0-pinctrl.dtsi
> new file mode 100644
> index 0000000000000..ab927c6cd6146
> --- /dev/null
> +++ b/arch/riscv/boot/dts/ultrarisc/dp1000-shenrongda-m0-pinctrl.dtsi
> @@ -0,0 +1,79 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright(C) 2026 UltraRISC Technology (Shanghai) Co., Ltd.
> + */
> +
> +#include "dp1000.dtsi"

[Severity: Low]
Does building dp1000-shenrongda-m0.dtb with CONFIG_ARCH_ULTRARISC enabled fail
in dtc?

arch/riscv/boot/dts/ultrarisc/dp1000-shenrongda-m0.dts includes
dp1000-shenrongda-m0-pinctrl.dtsi, which in turn includes
arch/riscv/boot/dts/ultrarisc/dp1000.dtsi. In dp1000.dtsi, the plic node has a
duplicated @9000000 unit-address suffix:

arch/riscv/boot/dts/ultrarisc/dp1000.dtsi:
		plic: interrupt-controller@9000000@9000000 {
			compatible = "ultrarisc,dp1000-plic", "ultrarisc,cp100-plic";
			reg = <0x0 0x9000000 0x0 0x4000000>;

When dtc compiles dp1000-shenrongda-m0.dts, fill_fullpaths() splits the node
name at the first '@' character, leaving get_unitname(node) as
"9000000@9000000", which triggers a fatal error in check_node_name_format():

scripts/dtc/checks.c:
static void check_node_name_format(struct check *c, struct dt_info *dti,
				   struct node *node)
{
	if (strchr(get_unitname(node), '@'))
		FAIL(c, dti, node, "multiple '@' characters in node name");
}
ERROR(node_name_format, check_node_name_format, NULL, &node_name_chars);

Should the plic node in dp1000.dtsi be named interrupt-controller@9000000
instead of interrupt-controller@9000000@9000000 so that
dp1000-shenrongda-m0.dtb compiles cleanly?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261024-ultrarisc-dts-v6-0-c62994d8a114@ultrarisc.com?part=6

  reply	other threads:[~2026-10-24  9:41 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-24  9:27 [PATCH v6 0/7] riscv: Add device tree support for UltraRISC DP1000 Xincheng Ji
2026-10-24  9:27 ` Xincheng Ji via B4 Relay
2026-10-24  9:27 ` Xincheng Ji via B4 Relay
2026-10-24  9:27 ` [PATCH v6 1/7] dt-bindings: vendor-prefixes: Add shenrongda Xincheng Ji
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27 ` [PATCH v6 2/7] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible Xincheng Ji
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27 ` [PATCH v6 3/7] dt-bindings: riscv: Add UltraRISC DP1000 board compatibles Xincheng Ji
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27 ` [PATCH v6 4/7] dt-bindings: timer: Add UltraRISC DP1000 CLINT Xincheng Ji
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27 ` [PATCH v6 5/7] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 Xincheng Ji
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:43   ` sashiko-bot
2026-10-24 10:18     ` Xincheng Ji
2026-10-24  9:27 ` [PATCH v6 6/7] riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree Xincheng Ji
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:41   ` sashiko-bot [this message]
2026-10-24  9:27 ` [PATCH v6 7/7] riscv: dts: ultrarisc: Add Milk-V Titan " Xincheng Ji
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:27   ` Xincheng Ji via B4 Relay
2026-10-24  9:50   ` sashiko-bot

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