From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=100.103.45.18 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1792899837; b=B30L2W0d/+p651+WoeVjSv2SHi5eNGjzLN7fkvjhqQwqT238eLEvjrM4ZxoyGhKJB1St Knpukm8YL/8EyCm1CSEoOllhpvRxzaY+3G0UbNUQ/lxK8n4kAKNKZrlZ5aM83Y5kBjVV9 mXx0Lkvre/4z/0iocm/FJJTj5XXHpExgLOWlKMUZ6YekV8fyJZ2sUUeR8m9vwO7/FAaff 2zM33zcXgRfnLceXjOvfHw+Azazd9qIpPPtYu00g+ErNTuhNLscUnE0B7ejhmy+lyfPRv sCsO5Jmd95AdjaQxjwTA2Yuxjp9c6Njla3rZ85So828WOWdC0j2WpzLt4TwxpnBqF6g== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1792899837; h=Received:DKIM-Signature:Message-ID:From:Subject:Reply-To:To:Cc: In-Reply-To:References:Content-Type:Content-Transfer-Encoding:Date; bh=iW/YLhq4YHP0MhB15W20oNAr9/VuOu4rVY5G+zlEu4U=; b=JPiA405N74EbQSqD4Sl4q4LRT4ZrEtmfxbL96T8foj4pNuC+O5vVsMhcubl9HOFjzZO1 /JDVo1gCh712TyrnmZeopuEUceDYzOXA4M5+MNwGHgTnqWTq2R4K1v9HiYrgpkxI1YXFr 3wTFQjpQ/nsxOoC2BeMuPAZc+B4zxPTc3qzWpYb0wzde5kvv48bjgJFISXC/ifBzRuTKg HN7T8vUtwaKAAOCq4AxAryByQqDxCzgM3SSrfyWch91bIDp42Hz6Nap0AKrw5DF9THzW0 9fjqxWR2lQMFK7y3mWYEOHxlAOc1TTrRzdd+NiQskaGhQJWh8HCe80Kf1xn2LWaJI1w== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=hS7gWp3Q; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 861B3606A31A for ; Sun, 25 Oct 2026 03:43:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=hS7gWp3Q Received: by smtp.kernel.org (Postfix) with ESMTPSA id 963341F01825; Sun, 25 Oct 2026 03:43:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1792899837; bh=iW/YLhq4YHP0MhB15W20oNAr9/VuOu4rVY5G+zlEu4U=; h=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date; b=hS7gWp3QzPbLRzE+djryIIzelFPMCuF42v+5PmHZdBgu6mtKwARLglsxZYbvOyr6a hGpvorNPbShJC4iMmijuW5ypbnS21TbYw4Gq1UItM2XCwmzwijepIh5Ezuk78XjMet Zis/zpRSmTA6/vkh0GlylC3jdsTY/qlVcEZ1hO48U3umaYdDbDDVmR/t+1mAXr27O8 gfjv1fvlKN2LrFWGk3O3ndIWAM/3F2NyUv3zqeKnaq1H+dN3MIzscN71Kt/B5wZOnc S99cppiR4/F5prFdTxxGMsSeGa01nkVtffShhGEz5NWzofiPdztIfz62YqPZ/7Hjpx oo5WPZEtxx7JQ== Message-ID: From: sashiko-bot@kernel.org Subject: Re: [PATCH v22 11/14] arm64: dts: qcom: kaanapali: Add CAMSS and CSIPHY block definitions Reply-To: sashiko-reviews@lists.linux.dev To: "Hangxiang Ma" Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org, media-ci@linuxtv.org, vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com In-Reply-To: <20261024-kaanapali-camss-v22-11-7da3ea49c8a1@oss.qualcomm.com> References: <20261024-kaanapali-camss-v22-0-7da3ea49c8a1@oss.qualcomm.com> <20261024-kaanapali-camss-v22-11-7da3ea49c8a1@oss.qualcomm.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Date: Sun, 25 Oct 2026 03:43:56 +0000 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list Thank you for your contribution! Sashiko AI review found 2 potential issue(= s) to consider: - [High] arm64: dts: qcom: kaanapali: CSIPHY opp-300000000 mismatches 266.6= 7 MHz RCG - [Low] arm64: dts: qcom: kaanapali: unused dt-bindings/phy/phy.h include -- commit 42e005ff9edc4076b7d2be241a23c845a3953115 Author: Hangxiang Ma arm64: dts: qcom: kaanapali: Add CAMSS and CSIPHY block definitions This commit adds the CAMSS and six CSIPHY device tree nodes along with the CSIPHY OPP table to the Kaanapali SoC device tree. > diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dt= s/qcom/kaanapali.dtsi > index e48a179d07220..11df1c7c6e31d 100644 > --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi > +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi > @@ -20,6 +20,7 @@ > #include > #include > #include > +#include [Severity: Low] This isn't a bug, but is the dt-bindings/phy/phy.h include needed here? None of the PHY_NONE, PHY_TYPE_*, or PHY_POL_* constants from this header appear to be used in kaanapali.dtsi or its board overlays. [ ... ] > @@ -6548,6 +6925,28 @@ pdp_tx: scp-sram-section@100 { > }; > }; > =20 > + csiphy_mxc_opp_table: opp-table-mxc { > + compatible =3D "operating-points-v2"; > + > + opp-300000000 { > + opp-hz =3D /bits/ 64 <300000000>; > + required-opps =3D <&rpmhpd_opp_low_svs_d1>, > + <&rpmhpd_opp_low_svs_d1>; > + }; [Severity: High] Should this lowest OPP in csiphy_mxc_opp_table be 266666667 Hz instead of 300000000 Hz? Each csiphy0..csiphy5 node uses CAM_CC_CSIPHYn_CLK as its core clock, which= is parented to cam_cc_cphy_rx_clk_src with CLK_SET_RATE_PARENT. In drivers/clk/qcom/camcc-kaanapali.c, ftbl_cam_cc_cphy_rx_clk_src only suppor= ts 266.67 MHz, 400 MHz, and 480 MHz: static const struct freq_tbl ftbl_cam_cc_cphy_rx_clk_src[] =3D { F(266666667, P_CAM_CC_PLL0_OUT_MAIN, 4.5, 0, 0), F(400000000, P_CAM_CC_PLL0_OUT_MAIN, 3, 0, 0), F(480000000, P_CAM_CC_PLL0_OUT_MAIN, 2.5, 0, 0), { } }; When phy_qcom_mipi_csi2_power_on() -> phy_qcom_mipi_csi2_set_clock_rates() = in drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c runs for a CSI-2 link frequency where link_freq / 4 <=3D 300000000 Hz: opp =3D dev_pm_opp_find_freq_ceil(dev, &opp_rate); ... perf =3D dev_pm_opp_get_required_pstate(opp, pstate); pstate +=3D 1; ret =3D dev_pm_genpd_set_performance_state(csi2phy->pd_list->pd_devs[i], = perf); ... ret =3D dev_pm_opp_set_rate(dev, opp_rate); dev_pm_opp_find_freq_ceil() selects opp-300000000 and votes RPMHPD_MMCX and RPMHPD_MXC to rpmhpd_opp_low_svs_d1. However, because cam_cc_cphy_rx_clk_src uses clk_rcg2_shared_ops (ceiling lookup), dev_pm_opp_set_rate(dev, 3000000= 00) rounds the clock rate up to 400000000 Hz. Doesn't this leave the CSIPHY core clock running at 400 MHz while MMCX and MXC are only voted to rpmhpd_opp_low_svs_d1 instead of rpmhpd_opp_low_svs, and make the 266666667 Hz clock rate unreachable? --=20 Sashiko AI review =C2=B7 https://sashiko.dev/#/patchset/20261024-kaanapali-= camss-v22-0-7da3ea49c8a1@oss.qualcomm.com?part=3D11 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C6D99606A321 for ; Sun, 25 Oct 2026 03:43:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=RhslGd3T; dkim=fail reason="signature verification failed" (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=hS7gWp3Q DKIM-Signature: v=1; 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Sun, 25 Oct 2026 03:43:57 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by sea.source.kernel.org (Postfix) with ESMTP id 2823D43F71; Sun, 25 Oct 2026 03:43:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 963341F01825; Sun, 25 Oct 2026 03:43:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1792899837; bh=iW/YLhq4YHP0MhB15W20oNAr9/VuOu4rVY5G+zlEu4U=; h=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date; b=hS7gWp3QzPbLRzE+djryIIzelFPMCuF42v+5PmHZdBgu6mtKwARLglsxZYbvOyr6a hGpvorNPbShJC4iMmijuW5ypbnS21TbYw4Gq1UItM2XCwmzwijepIh5Ezuk78XjMet Zis/zpRSmTA6/vkh0GlylC3jdsTY/qlVcEZ1hO48U3umaYdDbDDVmR/t+1mAXr27O8 gfjv1fvlKN2LrFWGk3O3ndIWAM/3F2NyUv3zqeKnaq1H+dN3MIzscN71Kt/B5wZOnc S99cppiR4/F5prFdTxxGMsSeGa01nkVtffShhGEz5NWzofiPdztIfz62YqPZ/7Hjpx oo5WPZEtxx7JQ== Message-ID: From: sashiko-bot@kernel.org Subject: Re: [PATCH v22 11/14] arm64: dts: qcom: kaanapali: Add CAMSS and CSIPHY block definitions To: "Hangxiang Ma" Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org, media-ci@linuxtv.org, vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com In-Reply-To: <20261024-kaanapali-camss-v22-11-7da3ea49c8a1@oss.qualcomm.com> References: <20261024-kaanapali-camss-v22-0-7da3ea49c8a1@oss.qualcomm.com> <20261024-kaanapali-camss-v22-11-7da3ea49c8a1@oss.qualcomm.com> Date: Sun, 25 Oct 2026 03:43:56 +0000 X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: sashiko-reviews@lists.linux.dev X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-phy" X-Spam-Status: No, score=-9.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 VGhhbmsgeW91IGZvciB5b3VyIGNvbnRyaWJ1dGlvbiEgU2FzaGlrbyBBSSByZXZpZXcgZm91bmQg MiBwb3RlbnRpYWwgaXNzdWUocykgdG8gY29uc2lkZXI6Ci0gW0hpZ2hdIGFybTY0OiBkdHM6IHFj b206IGthYW5hcGFsaTogQ1NJUEhZIG9wcC0zMDAwMDAwMDAgbWlzbWF0Y2hlcyAyNjYuNjcgTUh6 IFJDRwotIFtMb3ddIGFybTY0OiBkdHM6IHFjb206IGthYW5hcGFsaTogdW51c2VkIGR0LWJpbmRp bmdzL3BoeS9waHkuaCBpbmNsdWRlCi0tCgpjb21taXQgNDJlMDA1ZmY5ZWRjNDA3NmI3ZDJiZTI0 MWEyM2M4NDVhMzk1MzExNQpBdXRob3I6IEhhbmd4aWFuZyBNYSA8aGFuZ3hpYW5nLm1hQG9zcy5x dWFsY29tbS5jb20+Cgphcm02NDogZHRzOiBxY29tOiBrYWFuYXBhbGk6IEFkZCBDQU1TUyBhbmQg Q1NJUEhZIGJsb2NrIGRlZmluaXRpb25zCgpUaGlzIGNvbW1pdCBhZGRzIHRoZSBDQU1TUyBhbmQg c2l4IENTSVBIWSBkZXZpY2UgdHJlZSBub2RlcyBhbG9uZyB3aXRoIHRoZQpDU0lQSFkgT1BQIHRh YmxlIHRvIHRoZSBLYWFuYXBhbGkgU29DIGRldmljZSB0cmVlLgoKPiBkaWZmIC0tZ2l0IGEvYXJj aC9hcm02NC9ib290L2R0cy9xY29tL2thYW5hcGFsaS5kdHNpIGIvYXJjaC9hcm02NC9ib290L2R0 cy9xY29tL2thYW5hcGFsaS5kdHNpCj4gaW5kZXggZTQ4YTE3OWQwNzIyMC4uMTFkZjFjN2M2ZTMx ZCAxMDA2NDQKPiAtLS0gYS9hcmNoL2FybTY0L2Jvb3QvZHRzL3Fjb20va2FhbmFwYWxpLmR0c2kK PiArKysgYi9hcmNoL2FybTY0L2Jvb3QvZHRzL3Fjb20va2FhbmFwYWxpLmR0c2kKPiBAQCAtMjAs NiArMjAsNyBAQAo+ICAjaW5jbHVkZSA8ZHQtYmluZGluZ3MvaW50ZXJjb25uZWN0L3Fjb20sa2Fh bmFwYWxpLXJwbWguaD4KPiAgI2luY2x1ZGUgPGR0LWJpbmRpbmdzL2ludGVycnVwdC1jb250cm9s bGVyL2FybS1naWMuaD4KPiAgI2luY2x1ZGUgPGR0LWJpbmRpbmdzL21haWxib3gvcWNvbS1pcGNj Lmg+Cj4gKyNpbmNsdWRlIDxkdC1iaW5kaW5ncy9waHkvcGh5Lmg+CgpbU2V2ZXJpdHk6IExvd10K VGhpcyBpc24ndCBhIGJ1ZywgYnV0IGlzIHRoZSBkdC1iaW5kaW5ncy9waHkvcGh5LmggaW5jbHVk ZSBuZWVkZWQgaGVyZT8gTm9uZQpvZiB0aGUgUEhZX05PTkUsIFBIWV9UWVBFXyosIG9yIFBIWV9Q T0xfKiBjb25zdGFudHMgZnJvbSB0aGlzIGhlYWRlciBhcHBlYXIKdG8gYmUgdXNlZCBpbiBrYWFu YXBhbGkuZHRzaSBvciBpdHMgYm9hcmQgb3ZlcmxheXMuCgpbIC4uLiBdCgo+IEBAIC02NTQ4LDYg KzY5MjUsMjggQEAgcGRwX3R4OiBzY3Atc3JhbS1zZWN0aW9uQDEwMCB7Cj4gIAkJfTsKPiAgCX07 Cj4gIAo+ICsJY3NpcGh5X214Y19vcHBfdGFibGU6IG9wcC10YWJsZS1teGMgewo+ICsJCWNvbXBh dGlibGUgPSAib3BlcmF0aW5nLXBvaW50cy12MiI7Cj4gKwo+ICsJCW9wcC0zMDAwMDAwMDAgewo+ ICsJCQlvcHAtaHogPSAvYml0cy8gNjQgPDMwMDAwMDAwMD47Cj4gKwkJCXJlcXVpcmVkLW9wcHMg PSA8JnJwbWhwZF9vcHBfbG93X3N2c19kMT4sCj4gKwkJCQkJPCZycG1ocGRfb3BwX2xvd19zdnNf ZDE+Owo+ICsJCX07CgpbU2V2ZXJpdHk6IEhpZ2hdClNob3VsZCB0aGlzIGxvd2VzdCBPUFAgaW4g Y3NpcGh5X214Y19vcHBfdGFibGUgYmUgMjY2NjY2NjY3IEh6IGluc3RlYWQgb2YKMzAwMDAwMDAw IEh6PwoKRWFjaCBjc2lwaHkwLi5jc2lwaHk1IG5vZGUgdXNlcyBDQU1fQ0NfQ1NJUEhZbl9DTEsg YXMgaXRzIGNvcmUgY2xvY2ssIHdoaWNoIGlzCnBhcmVudGVkIHRvIGNhbV9jY19jcGh5X3J4X2Ns a19zcmMgd2l0aCBDTEtfU0VUX1JBVEVfUEFSRU5ULiBJbgpkcml2ZXJzL2Nsay9xY29tL2NhbWNj LWthYW5hcGFsaS5jLCBmdGJsX2NhbV9jY19jcGh5X3J4X2Nsa19zcmMgb25seSBzdXBwb3J0cwoy NjYuNjcgTUh6LCA0MDAgTUh6LCBhbmQgNDgwIE1IejoKCnN0YXRpYyBjb25zdCBzdHJ1Y3QgZnJl cV90YmwgZnRibF9jYW1fY2NfY3BoeV9yeF9jbGtfc3JjW10gPSB7CglGKDI2NjY2NjY2NywgUF9D QU1fQ0NfUExMMF9PVVRfTUFJTiwgNC41LCAwLCAwKSwKCUYoNDAwMDAwMDAwLCBQX0NBTV9DQ19Q TEwwX09VVF9NQUlOLCAzLCAwLCAwKSwKCUYoNDgwMDAwMDAwLCBQX0NBTV9DQ19QTEwwX09VVF9N QUlOLCAyLjUsIDAsIDApLAoJeyB9Cn07CgpXaGVuIHBoeV9xY29tX21pcGlfY3NpMl9wb3dlcl9v bigpIC0+IHBoeV9xY29tX21pcGlfY3NpMl9zZXRfY2xvY2tfcmF0ZXMoKSBpbgpkcml2ZXJzL3Bo eS9xdWFsY29tbS9waHktcWNvbS1taXBpLWNzaTItY29yZS5jIHJ1bnMgZm9yIGEgQ1NJLTIgbGlu awpmcmVxdWVuY3kgd2hlcmUgbGlua19mcmVxIC8gNCA8PSAzMDAwMDAwMDAgSHo6CgoJb3BwID0g ZGV2X3BtX29wcF9maW5kX2ZyZXFfY2VpbChkZXYsICZvcHBfcmF0ZSk7CgkuLi4KCQlwZXJmID0g ZGV2X3BtX29wcF9nZXRfcmVxdWlyZWRfcHN0YXRlKG9wcCwgcHN0YXRlKTsKCQlwc3RhdGUgKz0g MTsKCgkJcmV0ID0gZGV2X3BtX2dlbnBkX3NldF9wZXJmb3JtYW5jZV9zdGF0ZShjc2kycGh5LT5w ZF9saXN0LT5wZF9kZXZzW2ldLCBwZXJmKTsKCS4uLgoJcmV0ID0gZGV2X3BtX29wcF9zZXRfcmF0 ZShkZXYsIG9wcF9yYXRlKTsKCmRldl9wbV9vcHBfZmluZF9mcmVxX2NlaWwoKSBzZWxlY3RzIG9w cC0zMDAwMDAwMDAgYW5kIHZvdGVzIFJQTUhQRF9NTUNYIGFuZApSUE1IUERfTVhDIHRvIHJwbWhw ZF9vcHBfbG93X3N2c19kMS4gSG93ZXZlciwgYmVjYXVzZSBjYW1fY2NfY3BoeV9yeF9jbGtfc3Jj CnVzZXMgY2xrX3JjZzJfc2hhcmVkX29wcyAoY2VpbGluZyBsb29rdXApLCBkZXZfcG1fb3BwX3Nl dF9yYXRlKGRldiwgMzAwMDAwMDAwKQpyb3VuZHMgdGhlIGNsb2NrIHJhdGUgdXAgdG8gNDAwMDAw MDAwIEh6LgoKRG9lc24ndCB0aGlzIGxlYXZlIHRoZSBDU0lQSFkgY29yZSBjbG9jayBydW5uaW5n IGF0IDQwMCBNSHogd2hpbGUgTU1DWCBhbmQKTVhDIGFyZSBvbmx5IHZvdGVkIHRvIHJwbWhwZF9v cHBfbG93X3N2c19kMSBpbnN0ZWFkIG9mIHJwbWhwZF9vcHBfbG93X3N2cywKYW5kIG1ha2UgdGhl IDI2NjY2NjY2NyBIeiBjbG9jayByYXRlIHVucmVhY2hhYmxlPwoKLS0gClNhc2hpa28gQUkgcmV2 aWV3IMK3IGh0dHBzOi8vc2FzaGlrby5kZXYvIy9wYXRjaHNldC8yMDI2MTAyNC1rYWFuYXBhbGkt Y2Ftc3MtdjIyLTAtN2RhM2VhNDljOGExQG9zcy5xdWFsY29tbS5jb20/cGFydD0xMQoKLS0gCmxp bnV4LXBoeSBtYWlsaW5nIGxpc3QKbGludXgtcGh5QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cHM6 Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtcGh5Cg==