From: sashiko-bot@kernel.org
To: "Yingjie Wang" <1075151112@qq.com>
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [PATCH] perf: marvell: Fix DDR PMU polling period unit
Date: Tue, 27 Oct 2026 03:25:27 +0000 [thread overview]
Message-ID: <sashiko-outbox-186052@kernel.org> (raw)
In-Reply-To: <tencent_592E3D2D89322E934E28FE593E67826AAC09@qq.com>
> The poll_period_sec parameter specifies the overflow polling interval in
> seconds, but cn10k_ddr_pmu_timer_period() multiplies it by USEC_PER_SEC
> before passing it to ms_to_ktime(). This makes the interval 1000 times
> longer than requested: the default of 100 seconds becomes 100,000 seconds.
>
> The driver relies on polling to handle counter overflows. Delaying those
> checks can leave programmable counters frozen at their maximum value and
> lose events until they are restarted.
>
> Use MSEC_PER_SEC to convert the parameter to milliseconds for
> ms_to_ktime(). This corrects both the initial timer expiry and subsequent
> polling intervals.
>
> Fixes: 35a43326a9e3 ("perf/marvell: cn10k DDR perfmon event overflow handling")
> Cc: stable@vger.kernel.org
> Signed-off-by: Yingjie Wang <1075151112@qq.com>
Sashiko has reviewed this patch and found no issues.
--
Sashiko AI review · https://sashiko.dev/#/patchset/tencent_592E3D2D89322E934E28FE593E67826AAC09@qq.com?part=1
next prev parent reply other threads:[~2026-10-27 3:25 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-27 3:22 [PATCH] perf: marvell: Fix DDR PMU polling period unit Yingjie Wang
2026-10-27 3:25 ` sashiko-bot [this message]
2026-10-27 5:21 ` [EXTERNAL] " Geethasowjanya Akula
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