From: sashiko-bot@kernel.org
To: "Jackie Liu" <liu.yun@linux.dev>, glider@google.com
Cc: dvyukov@google.com, elver@google.com, pjw@kernel.org,
alex@ghiti.fr, aou@eecs.berkeley.edu, linux-mm@kvack.org,
kasan-dev@googlegroups.com, muchun.song@linux.dev
Subject: Re: [PATCH 3/3] riscv: keep booting if KFENCE pool reservation fails
Date: Tue, 27 Oct 2026 12:23:51 +0000 [thread overview]
Message-ID: <sashiko-outbox-186543@kernel.org> (raw)
In-Reply-To: <58e3baebbf4e454725e6bde8b7a267fb71cfdaae.1793017074.git.liuyun01@kylinos.cn>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] riscv: build failure on 32-bit and NOMMU from including asm/kfence.h
--
commit d964a4c4107a3db6e2c99928c0888060598196ba
Author: Jackie Liu <liuyun01@kylinos.cn>
riscv: keep booting if KFENCE pool reservation fails
This commit avoids hitting BUG_ON() when the early KFENCE pool reservation
fails in create_linear_mapping_page_table(), disabling KFENCE instead so the
kernel can continue booting.
> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> index fb37b0b67efec..393106cd25ba0 100644
> --- a/arch/riscv/mm/init.c
> +++ b/arch/riscv/mm/init.c
> @@ -27,6 +27,7 @@
> #include <asm/fixmap.h>
> #include <asm/io.h>
> #include <asm/kasan.h>
> +#include <asm/kfence.h>
[Severity: Low]
Does including asm/kfence.h unconditionally in arch/riscv/mm/init.c break
32-bit (CONFIG_32BIT=y) and NOMMU (CONFIG_MMU=n) RISC-V builds?
arch/riscv/mm/init.c is built unconditionally for all RISC-V configurations,
whereas HAVE_ARCH_KFENCE is only selected when MMU && 64BIT. In
arch/riscv/include/asm/kfence.h, kfence_protect_page() is defined outside of
any CONFIG_KFENCE guard:
arch/riscv/include/asm/kfence.h:
static inline bool kfence_protect_page(unsigned long addr, bool protect)
{
pte_t *pte = virt_to_kpte(addr);
if (protect) {
set_pte(pte, __pte(pte_val(ptep_get(pte)) & ~_PAGE_PRESENT));
} else {
set_pte(pte, __pte(pte_val(ptep_get(pte)) | _PAGE_PRESENT));
mark_new_valid_map();
}
preempt_disable();
local_flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
preempt_enable();
return true;
}
On 32-bit builds, mark_new_valid_map() is not declared because
arch/riscv/include/asm/cacheflush.h guards it under
#if defined(CONFIG_64BIT) && defined(CONFIG_MMU) with no fallback stub.
On NOMMU builds, virt_to_kpte() in include/linux/pgtable.h,
set_pte() / __pte() / pte_val() / ptep_get() in
arch/riscv/include/asm/pgtable.h, mark_new_valid_map() in
arch/riscv/include/asm/cacheflush.h, and local_flush_tlb_kernel_range() in
arch/riscv/include/asm/tlbflush.h are all guarded by #ifdef CONFIG_MMU and
are undeclared when compiling kfence_protect_page().
Should the include in arch/riscv/mm/init.c or the contents of
arch/riscv/include/asm/kfence.h be guarded by #ifdef CONFIG_KFENCE?
--
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1793017073.git.liuyun01@kylinos.cn?part=3
next prev parent reply other threads:[~2026-10-27 12:23 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-26 12:23 [PATCH 0/3] kfence: fix pool allocation failure handling Jackie Liu
2026-10-26 12:23 ` Jackie Liu
2026-10-26 12:23 ` [PATCH 1/3] kfence: fix pool cleanup on metadata allocation failure Jackie Liu
2026-10-26 12:23 ` Jackie Liu
2026-10-26 13:08 ` Marco Elver
2026-10-26 13:08 ` Marco Elver
2026-10-26 12:23 ` [PATCH 2/3] kfence: clear the pool pointer before freeing pages Jackie Liu
2026-10-26 12:23 ` Jackie Liu
2026-10-26 13:10 ` Marco Elver
2026-10-26 13:10 ` Marco Elver
2026-10-26 12:23 ` [PATCH 3/3] riscv: keep booting if KFENCE pool reservation fails Jackie Liu
2026-10-26 12:23 ` Jackie Liu
2026-10-27 12:23 ` sashiko-bot [this message]
2026-10-29 2:28 ` kernel test robot
2026-10-29 2:28 ` kernel test robot
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