Re: [PATCH 3/4] drm/panel: ilitek-ili9881c: add Mingjun MJ070BI30IA2

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/panel: ilitek-ili9881c: bit-shifted registers in mj070bi30ia2_init
--

commit 77fed3fe20435bd131c211abca1d6f6a36c89b5f
Author: Icenowy Zheng <zhengxingda@iscas.ac.cn>

drm/panel: ilitek-ili9881c: add Mingjun MJ070BI30IA2

This patch adds support for the Mingjun MJ070BI30IA2 7" MIPI DSI LCD panel,
including its initialization sequence, display mode timings, and device tree
compatible entry in the Ilitek ILI9881C panel driver.

> diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
> index c3d5ab67121d9..83148c40e25ca 100644
> --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
> +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
> @@ -2198,6 +2198,201 @@ static const struct ili9881c_instr waveshare_7inch_a_init[] = {
>  	ILI9881C_COMMAND_INSTR(0x36, 0x00),
>  };
>  
> +static const struct ili9881c_instr mj070bi30ia2_init[] = {
> +	ILI9881C_SWITCH_PAGE_INSTR(3),
> +	ILI9881C_COMMAND_INSTR(0x01, 0x00),
> +	ILI9881C_COMMAND_INSTR(0x02, 0x00),
> +	ILI9881C_COMMAND_INSTR(0x03, 0x73),
> +	ILI9881C_COMMAND_INSTR(0x04, 0x13),
> +	ILI9881C_COMMAND_INSTR(0x05, 0x00),
> +	ILI9881C_COMMAND_INSTR(0x06, 0x0A),
> +	ILI9881C_COMMAND_INSTR(0x07, 0x05),
> +	ILI9881C_COMMAND_INSTR(0x11, 0x00),
> +	ILI9881C_COMMAND_INSTR(0x09, 0x28),
> +	ILI9881C_COMMAND_INSTR(0x0A, 0x00),
> +	ILI9881C_COMMAND_INSTR(0x0B, 0x00),
> +	ILI9881C_COMMAND_INSTR(0x0C, 0x00),
> +	ILI9881C_COMMAND_INSTR(0x0D, 0x28),
> +	ILI9881C_COMMAND_INSTR(0x0E, 0x00),
> +	ILI9881C_COMMAND_INSTR(0x0F, 0x28),
> +	ILI9881C_COMMAND_INSTR(0x10, 0x28),
> +	ILI9881C_COMMAND_INSTR(0x11, 0x00),

[ ... ]

> +	ILI9881C_COMMAND_INSTR(0x36, 0x00),
> +	ILI9881C_COMMAND_INSTR(0x37, 0x08),
> +	ILI9881C_COMMAND_INSTR(0x70, 0x00),
> +	ILI9881C_COMMAND_INSTR(0x39, 0x00),

[ ... ]

> +	ILI9881C_COMMAND_INSTR(0x43, 0x08),
> +	ILI9881C_COMMAND_INSTR(0x44, 0x00),
> +	ILI9881C_COMMAND_INSTR(0xA0, 0x02),
> +	ILI9881C_COMMAND_INSTR(0x51, 0x23),
> +	ILI9881C_COMMAND_INSTR(0x52, 0x44),
> +	ILI9881C_COMMAND_INSTR(0x53, 0x67),

[ ... ]

> +	ILI9881C_COMMAND_INSTR(0x6E, 0x16),
> +	ILI9881C_COMMAND_INSTR(0x6F, 0x16),
> +	ILI9881C_COMMAND_INSTR(0x70, 0x06),
> +	ILI9881C_COMMAND_INSTR(0x71, 0x06),

[ ... ]

> +	ILI9881C_SWITCH_PAGE_INSTR(1),
> +	ILI9881C_COMMAND_INSTR(0x22, 0x0A),
> +	ILI9881C_COMMAND_INSTR(0x31, 0x00),
> +	ILI9881C_COMMAND_INSTR(0xA6, 0xA6),
> +	ILI9881C_COMMAND_INSTR(0x55, 0x3D),
> +	ILI9881C_COMMAND_INSTR(0x50, 0x9E),
> +	ILI9881C_COMMAND_INSTR(0x51, 0x99),
> +	ILI9881C_COMMAND_INSTR(0x60, 0x06),
> +	ILI9881C_COMMAND_INSTR(0x62, 0x20),
> +	ILI9881C_COMMAND_INSTR(0xA0, 0x00),
> +	ILI9881C_COMMAND_INSTR(0xA1, 0x17),
> +	ILI9881C_COMMAND_INSTR(0xA2, 0x26),
> +	ILI9881C_COMMAND_INSTR(0xA3, 0x13),
> +	ILI9881C_COMMAND_INSTR(0xA4, 0x16),
> +	ILI9881C_COMMAND_INSTR(0xA5, 0x29),
> +	ILI9881C_COMMAND_INSTR(0xA6, 0x1E),

[Severity: High]
Are some of the register addresses and values in mj070bi30ia2_init[] shifted
left by one bit (perhaps from a MIPI DSI bus capture or transcription error)?

When ili9881c_prepare() sends mj070bi30ia2_init[] to the panel controller,
four entries appear to have bit-shifted command addresses that leave their
intended registers unprogrammed while writing to registers that are later
overwritten:

1. In Page 3, between registers 0x07 and 0x09 (where all other ILI9881C
panels program register 0x08), the sequence writes to 0x11 ((0x08 << 1) | 1),
which is already programmed in its normal sequential position after 0x10.

2. In Page 3, between registers 0x37 and 0x39 (where register 0x38 belongs),
the sequence writes (0x70, 0x00) (0x38 << 1 == 0x70). Register 0x70 is later
overwritten in the 0x5F..0x8A GIP output mapping block with (0x70, 0x06),
leaving register 0x38 uninitialized.

3. In Page 3, between registers 0x44 and 0x51, at the start of the standard
0x50..0x5D GIP sequence (0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, ...), the table
has (0xA0, 0x02) instead of (0x50, 0x01) (0x50 << 1 == 0xA0, 0x01 << 1 ==
0x02), and register 0x52 is set to 0x44 instead of 0x45.

4. In Page 1, between register 0x31 and VCOM2 register 0x55 (where other
ILI9881C panels program VCOM1 register 0x53), the sequence writes
(0xA6, 0xA6) (0x53 << 1 == 0xA6). In Page 1, 0xA6 is a positive gamma
register that is unconditionally overwritten a few lines later by
(0xA6, 0x1E), leaving VCOM1 register 0x53 uninitialized.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261030-mj070bi30ia2-v1-0-a0f65b65c290@iscas.ac.cn?part=3