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From: sashiko-bot@kernel.org
To: "Davidlohr Bueso" <dave@stgolabs.net>
Cc: linux-cxl@vger.kernel.org
Subject: Re: [PATCH v10 04/10] cxl: Add HDM-DB region creation
Date: Sun, 01 Nov 2026 22:24:16 +0000	[thread overview]
Message-ID: <sashiko-outbox-192709@kernel.org> (raw)
In-Reply-To: <187374442f21d6cc52ec6b9e390550db198f05c2.1793567979.git.dave@stgolabs.net>

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Medium] cxl/acpi: cxl_acpi_cfmws_verify() rejects Host-only + BI windows on QEMU 11.0+
- [Medium] cxl: stale cxlds->bi state on reset in cxl_region_decode_commit()
- [Low] cxl/acpi: unreachable third coherency check in cxl_acpi_cfmws_verify()
--

commit d4a68ccdfa9e0e2b1d3fcb54967d9cb568d07b31
Author: Davidlohr Bueso <dave@stgolabs.net>

cxl: Add HDM-DB region creation

This commit adds support for creating HDM-DB (device-coherent with
back-invalidate) CXL regions via sysfs and auto-assembly, introduces
CFMWS coherency verification in cxl_acpi_cfmws_verify(), and exposes the
cap_back_invalidate and back_invalidate sysfs attributes.

> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index b7ce6b59c680b..cc7c99d3066d8 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -152,6 +152,8 @@ static unsigned long cfmws_to_decoder_flags(int restrictions)
>  		flags |= CXL_DECODER_F_PMEM;
>  	if (restrictions & ACPI_CEDT_CFMWS_RESTRICT_FIXED)
>  		flags |= CXL_DECODER_F_LOCK;
> +	if (restrictions & ACPI_CEDT_CFMWS_RESTRICT_BI)
> +		flags |= CXL_DECODER_F_BI;
>  
>  	return flags;
>  }
> @@ -198,6 +200,24 @@ static int cxl_acpi_cfmws_verify(struct device *dev,
>  		dev_dbg(dev, "CFMWS length %d greater than expected %d\n",
>  			cfmws->header.length, expected_len);
>  
> +	if ((cfmws->restrictions & ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM) &&
> +	    (cfmws->restrictions & ACPI_CEDT_CFMWS_RESTRICT_BI)) {
> +		dev_err(dev, "CFMWS cannot have both HDM-H and HDM-DB\n");
> +		return -EINVAL;
> +	}

[Severity: Medium]
As reported by Alison Schofield on v9 [1], does rejecting the entire CFMWS
window in cxl_acpi_cfmws_verify() when both ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM
and ACPI_CEDT_CFMWS_RESTRICT_BI are set cause a regression on released QEMU
v11.0+ systems?

During cxl_acpi_probe() -> acpi_table_parse_cedt() -> cxl_parse_cfmws() ->
__cxl_parse_cfmws() -> cxl_acpi_cfmws_verify(), returning -EINVAL for this
combination aborts root decoder registration completely. Because released
QEMU versions from v11.0 onward set both restriction bits by default, CXL
windows are rejected at boot and manual HDM-H region creation is lost on
windows where BI was previously ignored.

Could cfmws_to_decoder_flags() withhold CXL_DECODER_F_BI when
ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM is set (or when
ACPI_CEDT_CFMWS_RESTRICT_DEVMEM is not set) instead of failing the entire
window in cxl_acpi_cfmws_verify()?

> +
> +	if (!(cfmws->restrictions & (ACPI_CEDT_CFMWS_RESTRICT_DEVMEM |
> +				     ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM))) {
> +		dev_err(dev, "CFMWS has no coherency model\n");
> +		return -EINVAL;
> +	}
> +
> +	if ((cfmws->restrictions & ACPI_CEDT_CFMWS_RESTRICT_BI) &&
> +	    !(cfmws->restrictions & ACPI_CEDT_CFMWS_RESTRICT_DEVMEM)) {
> +		dev_err(dev, "CFMWS BI requires device-coherent\n");
> +		return -EINVAL;
> +	}

[Severity: Low]
Can this third check in cxl_acpi_cfmws_verify() ever be reached?

For (cfmws->restrictions & ACPI_CEDT_CFMWS_RESTRICT_BI) &&
!(cfmws->restrictions & ACPI_CEDT_CFMWS_RESTRICT_DEVMEM) to evaluate to
true, ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM must be either set or clear:

- If ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM is set, the first check
  ((cfmws->restrictions & ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM) &&
  (cfmws->restrictions & ACPI_CEDT_CFMWS_RESTRICT_BI)) already returns
  -EINVAL.

- If ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM is clear (with
  ACPI_CEDT_CFMWS_RESTRICT_DEVMEM also clear), the second check
  (!(cfmws->restrictions & (ACPI_CEDT_CFMWS_RESTRICT_DEVMEM |
  ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM))) already logs "CFMWS has no
  coherency model" and returns -EINVAL.

> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index a048bd5c06cb6..28c61feef06d2 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -313,8 +313,25 @@ static int commit_decoder(struct cxl_decoder *cxld)
>  static int cxl_region_decode_commit(struct cxl_region *cxlr)
>  {
>  	struct cxl_region_params *p = &cxlr->params;
> +	bool hdm_db;
>  	int i, rc = 0;
>  
> +	hdm_db = cxlr->type == CXL_DECODER_DEVMEM &&
> +		 cxl_root_decoder_is_bi(cxlr->cxlrd);
> +
> +	/* a reset since attach may have invalidated cxlds->bi */
> +	for (i = 0; i < p->nr_targets; i++) {
> +		struct cxl_endpoint_decoder *cxled = p->targets[i];
> +		struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
> +
> +		if (hdm_db && !cxlmd->cxlds->bi) {
> +			dev_err(&cxlr->dev, "%s:%s BI not enabled on device\n",
> +				dev_name(&cxlmd->dev),
> +				dev_name(&cxled->cxld.dev));
> +			return -ENXIO;
> +		}
> +	}
> +
>  	for (i = 0; i < p->nr_targets; i++) {
>  		struct cxl_endpoint_decoder *cxled = p->targets[i];
>  		struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
> @@ -346,6 +363,21 @@ static int cxl_region_decode_commit(struct cxl_region *cxlr)
>  			cxled->cxld.reset(&cxled->cxld);
>  			goto err;
>  		}
> +
> +		/*
> +		 * A reset after the check above wipes BI Enable, but
> +		 * cxlds->bi is only refreshed from .reset_done, which may
> +		 * not have run. Ask the hardware.
> +		 */
> +		if (hdm_db && !cxl_bi_decoder_enabled(cxled_to_port(cxled))) {
> +			dev_err(&cxlr->dev,
> +				"%s:%s BI disabled by reset during commit\n",
> +				dev_name(&cxlmd->dev),
> +				dev_name(&cxled->cxld.dev));
> +			rc = -ENXIO;
> +			i++; /* this target committed, so undo it too */
> +			goto err;
> +		}

[Severity: Medium]
When a reset clears CXL_BI_DECODER_CTRL_BI_ENABLE in hardware without
.reset_done (cxl_bi_reset_detected()) having updated cxlmd->cxlds->bi (for
example, during a concurrent reset before .reset_done runs, a secondary bus
reset that does not invoke .reset_done, or on a Type-2 device driver that
does not call cxl_bi_reset_detected()), doesn't this leave cxlmd->cxlds->bi
stale and transiently commit decoders before rolling them back?

First, in the pre-commit loop at the top of cxl_region_decode_commit(), only
the software flag !cxlmd->cxlds->bi is checked rather than
cxl_bi_decoder_enabled(cxled_to_port(cxled)). If hardware BI Enable was
already cleared while cxlmd->cxlds->bi is still true,
cxl_region_decode_commit() programs and commits the endpoint and switch HDM
decoders in hardware with CXL_HDM_DECODER0_CTRL_BI set before catching the
mismatch in the post-commit check and rolling back via
cxl_region_decode_reset().

Second, when the post-commit check detects
!cxl_bi_decoder_enabled(cxled_to_port(cxled)), it does not clear
cxlmd->cxlds->bi = false. If .reset_done never runs, cxlmd->cxlds->bi
remains true indefinitely: back_invalidate_show() in
drivers/cxl/core/port.c continues to report 1 while the decoder is attached,
cxl_region_check_coherency() continues to allow attaching the endpoint to
HDM-DB regions, subsequent commit_store() calls repeat the hardware commit
and rollback cycle, and cxl_bi_release() attempts to disable BI on teardown.

Should the pre-commit check also verify
cxl_bi_decoder_enabled(cxled_to_port(cxled)), and should cxlmd->cxlds->bi be
updated when hardware BI Enable is found cleared?

[1] https://lore.kernel.org/r/ar3TU4IM_TtcGgwl@aschofie-mobl2.lan

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1793567979.git.dave@stgolabs.net?part=4

  reply	other threads:[~2026-11-01 22:24 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-01 21:50 [PATCH v10 00/10] cxl: Support Back-Invalidate Davidlohr Bueso
2026-11-01 21:50 ` [PATCH v10 01/10] cxl: Add BI register probing and port initialization Davidlohr Bueso
2026-11-01 21:50 ` [PATCH v10 02/10] cxl/pci: Add BI topology enable/disable Davidlohr Bueso
2026-11-01 21:51 ` [PATCH v10 03/10] cxl/hdm: Add BI coherency support for endpoint decoders Davidlohr Bueso
2026-11-01 21:51 ` [PATCH v10 04/10] cxl: Add HDM-DB region creation Davidlohr Bueso
2026-11-01 22:24   ` sashiko-bot [this message]
2026-11-03 20:46     ` Davidlohr Bueso
2026-11-03  2:52   ` Alison Schofield
2026-11-03 20:52     ` Davidlohr Bueso
2026-11-01 21:51 ` [PATCH v10 05/10] cxl/hdm: Rename decoder coherency flags Davidlohr Bueso
2026-11-01 21:51 ` [PATCH v10 06/10] cxl/region: Log the coherency model at region creation Davidlohr Bueso
2026-11-01 21:51 ` [PATCH v10 07/10] cxl/pci: Split BI capability probe from setup Davidlohr Bueso
2026-11-01 21:51 ` [PATCH v10 08/10] cxl: Handle auto-committed BI hdm decoders Davidlohr Bueso
2026-11-02  8:21   ` Li Ming
2026-11-02 20:04     ` Davidlohr Bueso
2026-11-03  2:48   ` Alison Schofield
2026-11-01 21:51 ` [PATCH v10 09/10] cxl/test: Add mock BI topology support Davidlohr Bueso
2026-11-03  2:54   ` Alison Schofield
2026-11-01 21:51 ` [PATCH v10 10/10] cxl/doc: Update maturity map with BI support Davidlohr Bueso

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