From: sashiko-bot@kernel.org
To: "Wenmeng Liu" <wenmeng.liu@oss.qualcomm.com>
Cc: mfd@lists.linux.dev, devicetree@vger.kernel.org, robh@kernel.org,
conor+dt@kernel.org, lee@kernel.org
Subject: Re: [PATCH RFC 2/3] dt-bindings: i2c: qcom-cci: Document Nord compatible
Date: Thu, 05 Nov 2026 11:22:57 +0000 [thread overview]
Message-ID: <sashiko-outbox-198941@kernel.org> (raw)
In-Reply-To: <20261105-ccu-v1-2-3accc4b901de@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: i2c: qcom-cci: split unwieldy per-variant schema conditionals
--
commit 462fd62ad81784bc39c8c1fb16b33e4aa1f4c6be
Author: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
dt-bindings: i2c: qcom-cci: Document Nord compatible
This commit documents the qcom,nord-cci compatible string in
Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml, along with its four
required clocks and the new qcom,ccu-mux-sel property for configuring the CCU
wrapper output mux.
> diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
> index 1e8def25ec0ec..5a25ebe0e61f6 100644
> --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
> +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
> @@ -29,6 +29,7 @@ properties:
> - qcom,glymur-cci
> - qcom,kaanapali-cci
> - qcom,milos-cci
> + - qcom,nord-cci
> - qcom,qcm2290-cci
> - qcom,qcs8300-cci
> - qcom,sa8775p-cci
> @@ -70,6 +71,20 @@ properties:
> reg:
> maxItems: 1
>
> + qcom,ccu-mux-sel:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + On SoCs where the CCI sits in a CCU wrapper, the CCI I2C ports are
> + routed to the CCU after reset and the CCU output mux has to select the
> + CCI before any transfer.
> + items:
> + - items:
> + - description: phandle to the Titan CAM_TOP syscon
> + - description: byte offset of the CCU output mux register in the
> + syscon
> + - description: mask of the mux bits of this CCI, set to 1 to route
> + the I2C ports to this CCI
> +
> patternProperties:
> "^i2c-bus@[01]$":
> $ref: /schemas/i2c/i2c-controller.yaml#
> @@ -131,6 +146,32 @@ allOf:
> - const: cci_ahb
> - const: cci
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: qcom,nord-cci
> + then:
> + properties:
> + clocks:
> + items:
> + - description: Camera subsystem top AHB clock, needed by the CCI
> + register interface and to access the CCU output mux
> + - description: CCI core clock
> + - description: AHB clock of the CCU wrapper the CCI sits in
> + - description: Camera subsystem top fast AHB clock
> + clock-names:
> + items:
> + - const: ahb
> + - const: cci
> + - const: ccu_ahb
> + - const: fast_ahb
> + required:
> + - qcom,ccu-mux-sel
> + else:
> + properties:
> + qcom,ccu-mux-sel: false
[Severity: Low]
Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml already contains
eleven per-compatible if-then blocks under allOf to handle variant differences
in clocks, child I2C buses, and power domains.
Since qcom,nord-cci sits inside a CCU wrapper, introduces a variant-specific
qcom,ccu-mux-sel property that must be disallowed for all other compatibles,
and uses a distinct four-clock configuration (ahb, cci, ccu_ahb, fast_ahb),
would it be cleaner to split this binding into separate schema documents
rather than adding a twelfth per-compatible conditional block here?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261105-ccu-v1-0-3accc4b901de@oss.qualcomm.com?part=2
next prev parent reply other threads:[~2026-11-05 11:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-05 11:10 [PATCH RFC 0/3] Support the Nord CCI CCU output mux Wenmeng Liu
2026-11-05 11:10 ` [PATCH RFC 1/3] dt-bindings: mfd: syscon: Add Qualcomm Nord Titan CAM_TOP Wenmeng Liu
2026-11-05 11:11 ` [PATCH RFC 2/3] dt-bindings: i2c: qcom-cci: Document Nord compatible Wenmeng Liu
2026-11-05 11:22 ` sashiko-bot [this message]
2026-11-05 11:11 ` [PATCH RFC 3/3] i2c: qcom-cci: Support the CCU output mux Wenmeng Liu
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